At Rambus, we create cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting.
Found 211 Results
It’s Official: HBM3 Dons The Crown Of Bandwidth King
https://semiengineering.com/its-official-hbm3-dons-the-crown-of-bandwidth-king/#new_tabWith the publishing of the HBM3 update to the High Bandwidth Memory (HBM) standard, a new king of bandwidth is crowned. The torrid performance demands of advanced workloads, with AI/ML training leading the pack, drive the need for ever faster delivery of bits. Memory bandwidth is a critical enabler of computing performance, thus the need […]
AI Accelerates HBM Momentum
https://www.rambus.com/blogs/ai-accelerates-hbm-momentum/In a recent EE Times article, Gary Hilson notes that high bandwidth memory (HBM) deployments are becoming more mainstream due to the massive growth and diversity in artificial intelligence (AI) applications. “HBM is [now] less than niche. It’s even become less expensive, but it’s still a premium memory and requires expertise to implement,” writes Hilson. […]
How Rambus is Making Data Faster and Safer in 2022 and Beyond
https://www.rambus.com/blogs/rambus-2021-wrapped/Throughout 2021 and early 2022, Rambus has continued to make data faster and safer with the launch of key products, industry initiatives, and strategic partnerships. To address the insatiable demand for more bandwidth in the data center, we announced our 8.4 Gbps HBM3-Ready Memory Subsystem, confirmed the sampling of our DDR5 5600 MT/s 2nd-generation RCD chip, demonstrated our PCI Express® (PCIe) 5.0 digital controller IP on leading FPGA platforms, and unveiled our CXL Memory Interconnect Initiative. Looking ahead to 2022 and beyond, these products, initiatives, and partnerships will help power the […]
Bring on the Bandwidth with HBM3 Memory
https://go.rambus.com/bring-on-the-bandwidth-with-hbm3-memory#new_tabJoin memory interface technology expert Frank Ferro as he discusses the capabilities of, and design considerations for, the upcoming 3rd- generation of high-bandwidth memory: HBM3.
Side-channel attacks explained: everything you need to know
https://www.rambus.com/blogs/side-channel-attacks/In this blog post, we take an in-depth look at the world of side-channel attacks. We describe how side-channel attacks work and detail some of the most common attack methodologies. We also explore differential power analysis (DPA), an extremely powerful side-channel attack capable of obtaining and analyzing statistical measurements across multiple operations. In addition, we […]
HBM3 Memory: Break Through to Greater Bandwidth
https://go.rambus.com/hbm3-memory-break-through-to-greater-bandwidth#new_tabAI/ML’s demands for greater bandwidth are insatiable driving rapid improvements in every aspect of computing hardware and software. HBM memory is the ideal solution for the high bandwidth requirements of AI/ML training, but it entails additional design considerations given its 2.5D architecture. Now we’re on the verge of a new generation of HBM that will […]
Delivering Terabyte-Scale Bandwidth with HBM3-Ready Memory Subsystem
https://www.rambus.com/blogs/hbm3-memory-subsystem/An exponential rise in data volume, and the meteoric rise of advanced workloads like AI/ML training, requires constant innovation in all aspects of computing. Memory bandwidth is a critical enabler of unleashing the power of processors and accelerators, and the High Bandwidth Memory (HBM) standard has evolved rapidly to deliver the performance required by the most demanding applications. For current generation HBM2E, Rambus […]
Rambus Advances AI/ML Performance with 8.4 Gbps HBM3-Ready Memory Subsystem
https://www.rambus.com/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem/Highlights: Provides HBM3-ready memory subsystem solution consisting of fully-integrated PHY and digital controller Supports data rates up to 8.4 Gigabits per second (Gbps), enabling terabyte-scale bandwidth accelerators for artificial intelligence/machine learning (AI/ML) and high-performance computing (HPC) applications Leverages market-leading HBM2/2E experience and installed-base to speed implementation of customer designs using next-generation HBM3 memory SAN JOSE, […]
Rambus Design Summit Featured Speaker: Frank Ferro
https://www.rambus.com/blogs/rambus-design-summit-featured-speaker-frank-ferro/Thanks to everyone who joined us for Rambus Design Summit 2021. Over the coming weeks we’ll highlight the webinars and panels from the event all available now on-demand. About Frank Ferro Frank Ferro is the senior director of product management at Rambus Inc. responsible for memory interface IP products. Having spent more than 20 years […]
Selecting the Right High Bandwidth Memory Solution
https://go.rambus.com/selecting-the-right-high-bandwidth-memory-solution#new_tabAn exponentially rising tide of data has led to the development of application-specific silicon to tackle the requirements of demanding workloads such as AI/ML training, Advanced Driver Assistance Systems (ADAS) for automotive, network graphics and HPC. To keep these processors and accelerators fed requires state-of-the-art memory solutions that deliver extremely high bandwidth. Frank Ferro will […]
