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Exploring the Impact of AI 2.0 on the Memory Landscape

https://www.rambus.com/blogs/exploring-the-impact-of-ai-2-0-on-the-memory-landscape/

Ask the Experts Interview with Dr. Steven Woo  AI is a rapidly evolving space. With the meteoric rise of generative AI applications in the past year, we are now firmly in the era of AI 2.0. This is characterized by large language models that place AI into the hands of millions of consumers and […]

AI 2.0 on the Memory Landscape with Steven Woo on Ask the Experts

https://www.rambus.com/blogs/ask-the-experts-exploring-the-impact-of-ai-2-0-on-the-memory-landscape/

In this episode of “Ask the Experts,” Dr. Steven Woo from Rambus Labs discusses the evolution of Artificial Intelligence (AI) from AI 1.0 to AI 2.0. As Dr. Woo explains, AI 2.0 is generative AI that can interpret complex requests and generate a wide range of outputs, including text, speech, code, images, music, video, and […]

[Infographic]: The Powerful Technologies that Enable Systems like ChatGPT to Thrive

https://www.rambus.com/blogs/infographic-the-powerful-technologies-that-enable-systems-like-chatgpt-to-thrive/

Generative AI has been making waves in the tech industry. The capability to understand context and perform tasks like creating and summarizing content with astonishing accuracy in seconds showcases the cutting-edge potential that generative AI has to transform business processes. Have you ever thought about the technologies that enable generative AI, including Chat GPT and […]

Rambus Initiates Accelerated Share Repurchase Program

https://www.rambus.com/rambus-initiates-accelerated-share-repurchase-program-6/

SAN JOSE, Calif., March 1, 2024 – Rambus Inc. (NASDAQ: RMBS), a premier chip and silicon IP provider making data faster and safer, today announced that it initiated an accelerated share repurchase program with Royal Bank of Canada, through its agent RBC Capital Markets, LLC (“Dealer”) to repurchase an aggregate of approximately $50 million of its common stock. “As […]

Unlocking the Potential of CXL 3.1 and PCIe 6.1 for Next-Generation Data Centers

https://go.rambus.com/unlocking-the-potential-of-cxl3-and-pcie6-for-next-generation-data-centers#new_tab

[Live on Feb 28] Increased demand for bandwidth, capacity and compute, coupled with the implications for increased data center costs, are the realities of the AI revolution. This is driving the need for new disaggregated architectures in the data center. Join Lou Ternullo to learn about how PCIe 6.1 and CXL 3.1 interfaces are evolving […]

HBM3E/3 Controller Product Brief

https://go.rambus.com/hbm3-controller-product-brief#new_tab

The Rambus HBM3E Controller supports data rates up to 9.6 Gbps per data pin. Download this brief to see the features and technical specs of the Rambus HBM3E/3 Controller.

Rambus Reports Fourth Quarter and Fiscal Year 2023 Financial Results

https://www.rambus.com/fourth-quarter-fiscal-year-2023-financial-results/

Delivered strong Q4 results with revenue and earnings at the high end of guidance Generated $54.8 million in cash from operations in Q4 Produced quarterly product revenue of $53.7 million driven by memory interface chips Launched industry’s first Gen4 DDR5 RCD for server memory modules SAN JOSE, Calif. – February 5, 2024 – Rambus Inc. […]

PCIe 6.1 Controller with AXI Product Brief

https://go.rambus.com/pcie6-controller-axi-product-brief#new_tab

The Rambus PCI Express® (PCIe) 6.1 Controller with AXI is a configurable and scalable design for ASIC implementations. Download the brief to see the features and the technical specs.

CXL 3.1 Controller with AXI Product Brief

https://go.rambus.com/cxl3-controller-axi-product-brief#new_tab

The Rambus Compute Express Link (CXL) 3.1 Controller with AXI leverages a silicon-proven PCIe controller architecture for the CXL.io path, and adds CXL.cache and CXL.mem paths specific to the CXL standard. Download the brief to see the features and the specs.

CXL 3.1 Controller Product Brief

https://go.rambus.com/cxl3-controller-product-brief#new_tab

The Rambus Compute Express Link (CXL) 3.1 Controller leverages a silicon-proven PCIe controller architecture for the CXL.io path, and adds CXL.cache and CXL.mem paths specific to the CXL standard. Download the brief to learn the features and the specs.

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