At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer.
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Lensless smart sensor technology is SWaP-C friendly
https://www.rambusblog.com/2015/01/26/lensless-smart-sensor-technology-is-swap-c-friendly/#new_tabWriting for Military Embedded Systems, Amanda Harvey notes that stringent size, weight, power and cost (SWaP-C) requirements are influencing nearly every modern military platform. “Everything seems to be getting smaller in the U.S. military arsenal – whether it’s an unmanned aerial vehicle (UAV), an intelligence, surveillance, and reconnaissance (ISR) payload, or a handheld GPS device,” […]
Lensless smart sensor technology is SWaP-C friendly
https://www.rambus.com/blogs/lensless-smart-sensor-technology-is-swap-c-friendly-2/Writing for Military Embedded Systems, Amanda Harvey notes that stringent size, weight, power and cost (SWaP-C) requirements are influencing nearly every modern military platform. “Everything seems to be getting smaller in the U.S. military arsenal – whether it’s an unmanned aerial vehicle (UAV), an intelligence, surveillance, and reconnaissance (ISR) payload, or a handheld GPS device,” […]
Rambus Appoints Tom Fisher to Its Board of Directors
https://www.rambus.com/rambus-appoints-tom-fisher-to-its-board-of-directors/Oracle executive brings extensive experience in developing cloud-based products and services SUNNYVALE, Calif. – January 22, 2015 – Rambus Inc. (NASDAQ: RMBS) today announced the appointment of Mr. Ellis Thomas Fisher as a director to its Board, effective immediately. Mr. Fisher is an industry veteran with extensive experience in cloud computing. He is currently senior […]
Tezzaron to Incorporate Rambus ReRAM Memory Technology
https://www.rambus.com/tezzaron-to-incorporate-rambus-reram-memory-technology/Architecture enhances power and performance in military, aerospace and commercial applications SUNNYVALE, Calif. and Naperville, Ill. – January 22, 2015 – Rambus Inc. (NASDAQ:RMBS) and Tezzaron Semiconductor today announced that they have signed an agreement to incorporate Rambus oxide-resistive memory (ReRAM) technology in forthcoming Tezzaron devices. This architecture license gives Tezzaron access to system IP, […]
Tezzaron licenses Rambus ReRAM
https://www.rambusblog.com/2015/01/22/tezzaron-licenses-rambus-reram/#new_tabRambus and Tezzaron Semiconductor have clinched an agreement to incorporate Rambus oxide-resistive memory (ReRAM) technology in upcoming Tezzaron devices. According to Rambus Labs VP Gary Bronner, the architecture license grants Tezzaron access to system IP, specifications and validation suites to design differentiated chips using ReRAM.
Tezzaron licenses Rambus ReRAM
https://www.rambus.com/blogs/tezzaron-licenses-rambus-reram-2/Rambus and Tezzaron Semiconductor have clinched an agreement to incorporate Rambus oxide-resistive memory (ReRAM) technology in upcoming Tezzaron devices. According to Rambus Labs VP Gary Bronner, the architecture license grants Tezzaron access to system IP, specifications and validation suites to design differentiated chips using ReRAM. “ReRAM is ideally suited to improve the power, performance and […]
Are stacked die creating new security risks?
https://www.rambusblog.com/2015/01/21/are-stacked-die-creating-new-security-risks/#new_tabWriting for Semiconductor Engineering, Ernest Worthman notes that while stacked die may improve performance and lower power, the use of through-silicon vias (TSVs) could potentially add new security risks. “With 2.5D architectures, IP blocks can be designed on separate dies and assembled using an interposer. Such a chip can have a stacked DRAM, a Wi-Fi […]
Are stacked die creating new security risks?
https://www.rambus.com/blogs/are-stacked-die-creating-new-security-risks-2/Writing for Semiconductor Engineering, Ernest Worthman notes that while stacked die may improve performance and lower power, the use of through-silicon vias (TSVs) could potentially add new security risks. “With 2.5D architectures, IP blocks can be designed on separate dies and assembled using an interposer. Such a chip can have a stacked DRAM, a Wi-Fi […]
Rambus Unveils On-chip Noise Monitor to Improve Quality and Reduce Time-to-Market of Complex SoCs
https://www.rambus.com/rambus-unveils-on-chip-noise-monitor/Compact IP enables accurate characterization of power supply noise in mobile and server applications SUNNYVALE, Calif. – January 20, 2015 – Rambus Inc. (NASDAQ:RMBS) today announced the addition of an On-chip Noise Monitor to its suite of tools and IP cores. The Noise Monitor is a compact IP block that enables easy and precise noise […]
On-chip Noise Monitor accelerates time-to-market for complex SOCs
https://www.rambusblog.com/2015/01/20/on-chip-noise-monitor-accelerates-time-to-market-for-complex-socs/#new_tabRambus has added an On-chip Noise Monitor to its suite of tools and IP cores. According to Loren Shalinsky, a Strategic Development Director at Rambus, the Noise Monitor is designed to accurately characterize power supply noise of low- power, high-performance complex IPs and electronic systems.
