At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer.
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Meeting the Needs of Generative AI Training with HBM3
https://go.rambus.com/meeting-the-needs-of-generative-ai-training-with-hbm3#new_tabGenerative AI training models are growing in both size and sophistication at a lightning pace, requiring more and more bandwidth. With its unique 2.5D/3D architecture, HBM3 can deliver Terrabytes per second of bandwidth at a system level. Join Frank Ferro to hear how HBM helps designers address the needs of state-of-the-art AI training models.
Powering AI/ML Inference with GDDR6 Memory
https://go.rambus.com/powering-ai-ml-inference-with-gddr6-memory#new_tabGDDR6 memory offers an impressive combination of bandwidth, capacity, latency and power. Frank Ferro will discuss how these features make it the ideal memory choice for AI/ML inference at the edge and highlight some of the key design considerations you need to keep in mind when implementing GDDR6 memory at ultra-high data rates.
What’s Next for DDR5 Memory?
https://go.rambus.com/whats-next-for-ddr5-memory#new_tabWith the industry now firmly on the path to enabling the next generation of servers with DDR5 memory, this presentation will look at what’s next in the DDR5 journey. Hear from John Eble on how DDR5 will scale to advanced performance levels, be deployed in new applications beyond RDIMMs, and how it is tailored for […]
Emerging Security Challenges in Highly Interconnected Semiconductor Systems
https://go.rambus.com/emerging-security-challenges-in-highly-interconnected-semiconductor-systems#new_tabThe swift advancements and growing intricacy of highly interconnected semiconductor systems have led to numerous security challenges that pose risks to the integrity, reliability, and performance of modern AI-driven systems. This presentation delves into the primary emerging security threats, such as supply chain attacks, intellectual property theft, hardware Trojans, side-channel attacks, fault injection attacks, and […]
Selecting the right Root of Trust HSM Design for Your Next Project
https://go.rambus.com/selecting-the-right-root-of-trust-hsm-design-for-your-next-project#new_tabA Root of Trust is the secure security foundation for a semiconductor or electronic system. In this presentation, Bart Stevens will guide you through the labyrinth of Root of Trust designs, including what problems they can solve and what solutions are available to implement in your next silicon design.
Protecting Devices and Data in the Quantum Era
https://go.rambus.com/protecting-devices-and-data-in-the-quantum-era#new_tabQuantum computers will eventually become powerful enough to break traditional asymmetric cryptographic methods, that is, some of the most common security protocols used to protect sensitive electronic data. This presentation will highlight the recent developments in post-quantum cryptography and discuss how designers can get ready for the quantum era.
Securing MCUs with SCA Protection in IoT Designs
https://go.rambus.com/securing-mcus-with-sca-protection-in-iot-designs#new_tabA side-channel attack (SCA) is a security exploit that attempts to extract secrets from a chip or a system. This presentation will give an overview of some of the most common types of SCA and highlight the countermeasures that designers can implement to diminish risk in low-power IoT designs.
Cybersecurity: A Top Priority for the Automotive Industry
https://go.rambus.com/cybersecurity-a-top-priority-for-the-automotive-industry#new_tabAutomotive systems, and the semiconductors used within them, are some of the most complex electronics seen today. That complexity is set to dramatically rise as cars reach new levels of automation. This presentation will explore how designers can navigate the delicate balance between achieving new levels of performance and automation, while meeting the safety and […]
The Convergence of MACsec and IPsec in Data Center Silicon Designs
https://go.rambus.com/the-convergence-of-macsec-and-ipsec-in-data-center-silicon-designs#new_tabData centers continue to adopt full line-rate security at various levels and use cases. Layer 2 (MACsec) and Layer 3 (IPsec) protocols are used to protect either full links or specific subnets or even customer-driven virtual networks. The integration of multiple security protocols is becoming an important requirement for data center silicon that aims to […]
Inline Memory Encryption to Enable Confidential Computing for Data Center Designs
https://go.rambus.com/ime-to-enable-confidential-computing-for-data-center-designs#new_tabThere is a growing industry consensus on the imperative of incorporating memory encryption in computing architectures for protecting data in use. Designing and implementing a secure memory encryption system can be complex and comes with unique challenges from both the memory and security technology perspectives. Join Ajay Kapoor to learn how memory encryption can be […]
