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The latest generation of the PCI Express, PCIe 5.0, advances performance to 32 GT/s in support of advanced applications including 400G Ethernet. In this webinar, Rambus technology experts Malini Narayanamoorthi and Vinitha Seevaratnam discuss the selection and implementation considerations for PCI Express solutions. A demonstration of the silicon-proven Rambus PCIe 5.0 interface solution consisting of […]
An exponentially rising tide of data has led to the development of application-specific silicon to tackle the requirements of demanding workloads such as AI/ML training, Advanced Driver Assistance Systems (ADAS) for automotive, network graphics and HPC. To keep these processors and accelerators fed requires state-of-the-art memory solutions that deliver extremely high bandwidth. Frank Ferro will […]
Joseph Rodriguez, senior product marketing engineer for IP cores at Rambus, has written an article for Semiconductor Engineering that explores the company’s recent achievement of reaching 4 gigabits per second (Gbps) data rate with its HBM2E memory interface. The milestone – which was demonstrated in silicon – required mastering substantial signal integrity and power integrity […]
Thierry Kouthon, a technical product manager at Rambus, recently wrote an article for Semiconductor Engineering that takes a closer look at the critical importance of securing automotive electronics. As Kouthon notes, modern cars can have up to 100 Electronic Control Units (ECUs) depending on their class, make, and model – with the number of ECUs […]
Displays for next-generation smartphones, AR/VR devices, and automotive systems all require more bandwidth than ever before. Using a combination of VESA Display Stream Compression (DSC) with the MIPI Display Serial Interface (DSI-2) technology, designers can achieve display resolutions up to 8K without compromise to video quality, battery life or cost. This presentation will showcase a […]
In response to an exponential growth in data, the industry is on the threshold of a groundbreaking architectural shift that will fundamentally change the performance, efficiency and cost of data centers around the globe. Server architecture, which has remained largely unchanged for decades, is taking a revolutionary step forward to address the growing demand for […]
Big changes are coming to the data center driven by an exponential rise in data volume and traffic. Disaggregation and composability would move us beyond the classic architecture of the server as the unit of computing. By separating the functional components of compute, memory, storage and networking into pools, composed on-demand to match the specific […]
Launches research and development effort to drive architectural shift in data centers with solutions for memory expansion and pooling that enable disaggregated and composable server architectures Combines unique expertise in high-speed interfaces, embedded security and server memory buffers to develop breakthrough solutions for next-generation data centers Leverages critical building blocks to be provided by PLDA […]
CXL Memory Initiative Enabling new memory tiers for breakthrough server performance Contact Us Data Center Challenges Data centers face three major memory challenges as roadblocks to greater performance and total cost of ownership (TCO). Data Center Memory Challenges The first of these is the limitations of the current server memory hierarchy. There is a three […]
Expands digital controller IP portfolio with complementary CXL 2.0, PCIe® 5.0 and PCIe 6.0 controller and switch IP Enables integrated interface subsystem solutions for data center, artificial intelligence and machine learning (AI/ML), and High Performance Computing (HPC) Provides critical building blocks for Rambus CXL Memory Interconnect Initiative to advance high-bandwidth connectivity SAN JOSE, Calif. – June […]