At Rambus, we create cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting.
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Powering the Next Wave of AI Applications
https://www.rambus.com/blogs/powering-the-next-wave-of-ai-applications/Artificial Intelligence/Machine Learning (AI/ML) grows at a blistering pace. The size of the largest training models has passed 100 billion parameters and is on pace to hit a trillion in the next year. The impact of AI/ML is being felt across the industry landscape, in higher education, and in financial markets. Underpinning this growth is […]
Lattice and Rambus to Partner on Next-Generation Security Solutions
https://www.rambus.com/lattice-and-rambus-to-partner-on-next-generation-security-solutions/SAN JOSE, Calif. and Hillsboro, OR – April 26, 2021 – Rambus Inc. (NASDAQ: RMBS), a provider of industry-leading chips and silicon IP making data faster and safer, and Lattice Semiconductor (NASDAQ: LSCC), the low power programmable leader, today announced a partnership to leverage their respective technology expertise in next-generation security solutions. Through the partnership, customers will have access […]
Rambus Expands High-Performance Memory Subsystem Offerings with HBM2E Solution on Samsung 14/11nm
https://www.rambus.com/rambus-expands-high-performance-memory-subsystem-offerings-with-hbm2e-solution-on-samsung-14-11nm/Highlights: Supports accelerators requiring terabyte-scale bandwidth for artificial intelligence/machine learning (AI/ML) training applications Fully-integrated HBM2E memory interface subsystem, consisting of verified PHY and controller, silicon proven on advanced Samsung 14/11nm FinFET process Backed by unrivaled system expertise supporting customers with interposer and package reference designs to speed time to market SAN JOSE, Calif. – April 21, 2021 – Rambus […]
Overcoming high-speed SerDes IP integration challenges: Part 2
https://www.rambus.com/blogs/overcoming-high-speed-serdes-ip-integration-challenges-part-2/In this two-part blog series based on a recent Semiconductor Engineering article, Rambus engineers Niall Sorensen and Malini Narayana Moorthi take an in-depth look at how to overcome high-speed SerDes IP integration challenges. In part one, the two point out that SerDes design is a complex process which requires a multidisciplinary team of analog, digital, […]
Rambus Joins DARPA Toolbox Initiative with State-of-the-Art Security and Interface IP
https://www.rambus.com/rambus-joins-darpa-toolbox-initiative-with-state-of-the-art-security-and-interface-ip/Highlights: Agreement makes Rambus Root of Trust, Secure Protocol Engines, along with Memory and SerDes PHYs and Controllers available to DARPA researchers Streamlined access to cutting-edge silicon IP accelerates forward-looking innovation DARPA researchers will be able to leverage industry-leading capabilities and expertise from Rambus SAN JOSE, Calif. – April 14, 2021 – Rambus Inc. (NASDAQ: RMBS), a provider of […]
Overcoming high-speed SerDes IP integration challenges: Part 1
https://www.rambus.com/blogs/overcoming-high-speed-serdes-ip-integration-challenges-part-1/Rambus engineers Niall Sorensen and Malini Narayana Moorthi recently wrote an article for Semiconductor Engineering that takes an in-depth look at how to overcome high-speed SerDes IP integration challenges. As Sorensen and Moorthi note, internet traffic continues to grow at a “breakneck pace,” with the demands on SerDes speeds increasing accordingly. The Complexity of High-Speed […]
What are the security implications of quantum computing?
https://www.rambus.com/blogs/what-are-the-security-implications-of-quantum-computing/Helena Handschuh, a Rambus Security Technologies fellow, recently wrote an article for Semiconductor Engineering that explores the security implications of quantum computing. As Handschuh notes, the U.S. Government has awarded $625 million in funding to create five quantum information research centers. “Industry and academic institutions will contribute $300 million toward this effort with the remainder […]
New MACsec Engine Secures TSN Ethernet
https://www.rambus.com/blogs/new-macsec-engine-secures-tsn-ethernet/Ethernet has become the ubiquitous communication solution from the desktop to the carrier network. Industries including aerospace, automotive, manufacturing and utilities are adopting Ethernet, replacing legacy networking and communication methods. Applications in this broad market space require deterministic behavior of the Ethernet link that is implemented with Time-Sensitive Network (TSN) standards: traffic shaping, priority queues, […]
MACsec-IP-161 Product Brief
https://go.rambus.com/macsec-ip-161-product-brief#new_tabThe MACsec-IP-161 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line rate. It provides classification, transformation and statistics for the IEEE802.1AE standard MACsec.
MACsec-IP-161
https://www.rambus.com/security/protocol-engines/macsec-ip-161/MACsec-IP-161: MACsec Single-port Engine Complete MACsec solution for single-port Ethernet with rates from 1G to 50 G and TSN support Contact Us The MACsec-IP-161 engine is an evolution of an industry proven Rambus MACsec-IP-160 that adds processing of IEEE802.3br preemption and Cisco ClearTags protocols. The engine is available in throughput/area optimized configuration to cover the […]
