At Rambus, we create cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting.
Found 3502 Results
CXL Memory Initiative
https://www.rambus.com/cxl-memory-initiative/CXL Memory Initiative Enabling new memory tiers for breakthrough server performance Contact Us Data Center Challenges Data centers face three major memory challenges as roadblocks to greater performance and total cost of ownership (TCO). Data Center Memory Challenges The first of these is the limitations of the current server memory hierarchy. There is a three […]
Rambus to Acquire PLDA, Extending Leadership with Cutting-Edge CXL™ and PCI Express® Digital IP
https://www.rambus.com/rambus-to-acquire-plda/Expands digital controller IP portfolio with complementary CXL 2.0, PCIe® 5.0 and PCIe 6.0 controller and switch IP Enables integrated interface subsystem solutions for data center, artificial intelligence and machine learning (AI/ML), and High Performance Computing (HPC) Provides critical building blocks for Rambus CXL Memory Interconnect Initiative to advance high-bandwidth connectivity SAN JOSE, Calif. – June […]
Rambus to Acquire AnalogX, Accelerating Next-Generation Data Center Interface Solutions
https://www.rambus.com/rambus-to-acquire-analogx/Extends leadership in PCIe® 5.0 and 32G Multi-protocol SerDes with ultra-low power interface IP Accelerates time to market and enhances the Rambus roadmap for PAM4-based PCIe 6.0 and CXL™ 3.0 solutions for data center, artificial intelligence and machine learning (AI/ML), 5G and High Performance Computing (HPC) Provides critical building blocks for Rambus CXL Memory Interconnect […]
Rambus Initiates Accelerated Share Repurchase Program
https://www.rambus.com/rambus-initiates-accelerated-share-repurchase-program-4/SAN JOSE, Calif., June 16, 2021 – Rambus Inc. (NASDAQ: RMBS), a provider of industry-leading chips and silicon IP making data faster and safer, today announced that it initiated an accelerated share repurchase program with Deutsche Bank AG, London Branch as counterparty, through its agent Deutsche Bank Securities Inc. (Deutsche Bank) to repurchase an aggregate of approximately […]
New interface architectures enable data scaling
https://www.rambus.com/blogs/new-interface-architectures-enable-data-scaling/Suresh Andani, senior director of product marketing at Rambus, has written an article for Semiconductor Engineering that takes a closer look at why data center scaling requires new interface architectures. As Andani notes, global data traffic is growing at an exponential rate. More specifically, 5G networks are enabling billions of AI-powered IoT devices untethered from […]
Security Solutions for AI/ML
https://go.rambus.com/security-solutions-for-ai-ml#new_tabAI/ML is increasingly pervasive across all industries driven by a massive wave of digitization. Data, the raw material of AI/ML and Deep Learning algorithms, is available in enormous quantities from all aspects of business operations. AI/ML promises great gains in responsiveness and adaptability in an ever-changing technology landscape, and industries are enthusiastically responding to that […]
Anti-tamper protection: How to meet evolving threats
https://www.rambus.com/blogs/anti-tamper-protection/Scott Best, Technical Director of Anti-Counterfeiting Products at Rambus, recently penned an article for Semiconductor Engineering that details why it is critical to scale anti-tamper protection to meet escalating threats. What is an anti-tamper protection? As Best notes, anti-tamper tends to be one of the industry’s “catchall phrases” encompassing any countermeasure on a security chip. […]
Avery Design Systems and Rambus Extend Memory Model and PCIe® VIP Collaboration
https://www.rambus.com/avery-design-systems-and-rambus-extend-memory-model-and-pcie-vip-collaboration/Tewksbury, MA. and San Jose, Calif. – May 19, 2021 – Avery Design Systems, a leader in functional verification solutions, and Rambus Inc. (NASDAQ: RMBS), a provider of industry-leading chips and silicon IP making data faster and safer, announced today they are extending their long-term memory model and PCIe® Verification IP (VIP) collaboration. Rambus utilizes Avery’s high-quality, full-featured memory models to verify their memory […]
Designing chiplet and co-packaged optics architectures with 112G XSR SerDes
https://www.rambus.com/blogs/designing-chiplet-and-co-packaged-optics-architectures-with-112g-xsr-serdes/Suresh Andani, senior director of product marketing at Rambus, has written an article for Semiconductor Engineering that takes an in-depth look at how 112G XSR SerDes can be used to optimally design chiplet and co-packaged optics architectures. As Andani notes, conventional chip designs are struggling to achieve the scalability, as well as power, performance, and […]
Stacking memory for AI/ML training with HBM2E
https://www.rambus.com/blogs/stacking-memory-for-ai-ml-training-with-hbm2e/Frank Ferro, Senior Director Product Management at Rambus, recently penned an article for Semiconductor Engineering that takes a closer look at high bandwidth memory (HBM) and 2.5D (stacking) architecture for AI/ML training. As Ferro notes, the impact of AI/ML increases daily – impacting nearly every industry across the globe. “In marketing, healthcare, retail, transportation, manufacturing […]
