At Rambus, we create cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting.
Found 3514 Results
Avery Design Systems and Rambus Extend Memory Model and PCIe® VIP Collaboration
https://www.rambus.com/avery-design-systems-and-rambus-extend-memory-model-and-pcie-vip-collaboration/Tewksbury, MA. and San Jose, Calif. – May 19, 2021 – Avery Design Systems, a leader in functional verification solutions, and Rambus Inc. (NASDAQ: RMBS), a provider of industry-leading chips and silicon IP making data faster and safer, announced today they are extending their long-term memory model and PCIe® Verification IP (VIP) collaboration. Rambus utilizes Avery’s high-quality, full-featured memory models to verify their memory […]
Designing chiplet and co-packaged optics architectures with 112G XSR SerDes
https://www.rambus.com/blogs/designing-chiplet-and-co-packaged-optics-architectures-with-112g-xsr-serdes/Suresh Andani, senior director of product marketing at Rambus, has written an article for Semiconductor Engineering that takes an in-depth look at how 112G XSR SerDes can be used to optimally design chiplet and co-packaged optics architectures. As Andani notes, conventional chip designs are struggling to achieve the scalability, as well as power, performance, and […]
Stacking memory for AI/ML training with HBM2E
https://www.rambus.com/blogs/stacking-memory-for-ai-ml-training-with-hbm2e/Frank Ferro, Senior Director Product Management at Rambus, recently penned an article for Semiconductor Engineering that takes a closer look at high bandwidth memory (HBM) and 2.5D (stacking) architecture for AI/ML training. As Ferro notes, the impact of AI/ML increases daily – impacting nearly every industry across the globe. “In marketing, healthcare, retail, transportation, manufacturing […]
Karen Rogge Joins Rambus Board of Directors
https://www.rambus.com/karen-rogge-joins-rambus-board-of-directors/SAN JOSE, Calif. — May 4, 2021 — Rambus Inc. (NASDAQ: RMBS), a provider of industry-leading chips and silicon IP making data faster and safer, today announced the addition of Karen Rogge to its Board of Directors. Ms. Rogge is a proven executive with extensive finance and operations management experience at leading public technology companies including […]
Rambus Reports First Quarter 2021 Financial Results
https://www.rambus.com/first-quarter-2021-financial-results/Delivered strong Q1 results at high end of revenue and profitability targets Product revenue of $30.8 million, up 41% quarter over quarter, consisting primarily of memory interface chips Generated $39.5 million in cash provided by operating activities SAN JOSE, Calif. – May 3, 2021 – Rambus Inc. (NASDAQ:RMBS), a provider of industry-leading chips and IP […]
Powering the Next Wave of AI Applications
https://www.rambus.com/blogs/powering-the-next-wave-of-ai-applications/Artificial Intelligence/Machine Learning (AI/ML) grows at a blistering pace. The size of the largest training models has passed 100 billion parameters and is on pace to hit a trillion in the next year. The impact of AI/ML is being felt across the industry landscape, in higher education, and in financial markets. Underpinning this growth is […]
Lattice and Rambus to Partner on Next-Generation Security Solutions
https://www.rambus.com/lattice-and-rambus-to-partner-on-next-generation-security-solutions/SAN JOSE, Calif. and Hillsboro, OR – April 26, 2021 – Rambus Inc. (NASDAQ: RMBS), a provider of industry-leading chips and silicon IP making data faster and safer, and Lattice Semiconductor (NASDAQ: LSCC), the low power programmable leader, today announced a partnership to leverage their respective technology expertise in next-generation security solutions. Through the partnership, customers will have access […]
Rambus Expands High-Performance Memory Subsystem Offerings with HBM2E Solution on Samsung 14/11nm
https://www.rambus.com/rambus-expands-high-performance-memory-subsystem-offerings-with-hbm2e-solution-on-samsung-14-11nm/Highlights: Supports accelerators requiring terabyte-scale bandwidth for artificial intelligence/machine learning (AI/ML) training applications Fully-integrated HBM2E memory interface subsystem, consisting of verified PHY and controller, silicon proven on advanced Samsung 14/11nm FinFET process Backed by unrivaled system expertise supporting customers with interposer and package reference designs to speed time to market SAN JOSE, Calif. – April 21, 2021 – Rambus […]
Overcoming high-speed SerDes IP integration challenges: Part 2
https://www.rambus.com/blogs/overcoming-high-speed-serdes-ip-integration-challenges-part-2/In this two-part blog series based on a recent Semiconductor Engineering article, Rambus engineers Niall Sorensen and Malini Narayana Moorthi take an in-depth look at how to overcome high-speed SerDes IP integration challenges. In part one, the two point out that SerDes design is a complex process which requires a multidisciplinary team of analog, digital, […]
Rambus Joins DARPA Toolbox Initiative with State-of-the-Art Security and Interface IP
https://www.rambus.com/rambus-joins-darpa-toolbox-initiative-with-state-of-the-art-security-and-interface-ip/Highlights: Agreement makes Rambus Root of Trust, Secure Protocol Engines, along with Memory and SerDes PHYs and Controllers available to DARPA researchers Streamlined access to cutting-edge silicon IP accelerates forward-looking innovation DARPA researchers will be able to leverage industry-leading capabilities and expertise from Rambus SAN JOSE, Calif. – April 14, 2021 – Rambus Inc. (NASDAQ: RMBS), a provider of […]
