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I don’t know about you, but when I hear the name Rambus, I think of the company that was founded in 1990. I remember them leaping into the limelight with a fanfare of trumpets. Well, if the truth be told, it was with their 600 MHz interface technology, which addressed the memory bottleneck issues being […]
5G represents a revolution in mobile technology with performance that will rival that of wireline networks. 5G’s Ultra-reliable Low Latency Communication (uRLLC) links will enable a profusion of artificial intelligence (AI)-powered IoT devices from delivery drones to smart cities. The rapid rise in the number of smart IoT devices, coupled with expanded connectivity, will greatly […]
In 2019, the worldwide fake semi market was estimated at $75 billion according to Industry Week. This counterfeit chip market particularly prevalent in the government and defense industries. According to a US government report, more than 1 million counterfeit electronic components were used in 1,800 instances affecting military aircraft and missiles.
In part three of this series, we discussed how a Roofline model can help system designers better understand if the performance of applications running on specific processors is limited more by compute resources, or by memory bandwidth. Rooflines are particularly useful when analyzing machine learning applications like neural networks running on artificial intelligence (AI) processors. […]
The latest generation of high-bandwidth memory, HBM2E, is around the corner. Now that Samsung has started mass production of its HBM2E memory stacks, Rambus has unveiled its controller and PHY (physical interface) designs.
The latest enhancements to the HBM2 standard will clearly be appreciated by developers of memory bandwidth-hungry ASICs, however in order to add support of HBM2E to their designs, they are also going to need an appropriate controller as well as physical interface. For many companies developing of such IP in-house does not make financial sense, so […]
In part two of this series, we took a closer look at how the upcoming deployment of 5G technology will enable processing at the edge, and how the industry is further refining the edge into the near edge and the far edge. The near edge is closer to the cloud, while the far edge is […]
Rambus has announced a comprehensive interface solution for HBM2E memory consisting of co-verified PHY and memory controller. Operating at a top speed of 3.2 Gbps over a 1024-bit wide interface, the interface can deliver 410 GB/s of bandwidth with a single HBM2E DRAM stack. Read first our primer on: HBM2E Implementation & Selection – The […]
For AI and HPC applications, HBM2E memory can deliver excellent bandwidth, capacity and latency in a very compact footprint thanks to its 2.5D/3D structure. The flipside is that this same structure leads to greater design complexity and raises a new set of implementation considerations.
The 2020 Designcon conference included many talks and exhibits with a storage and memory focus. Both Rambus and Teledyne LeCroy had tutorials on design and connectivity for leading edge electronic components and systems as well as testing memory systems. This piece will look at some material from the tutorials and exhibits that can inform us about disaggregated […]
