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Found 3616 Results
High-Performance Memory for AI/ML and HPC: Part 2
https://www.rambus.com/blogs/high-performance-memory-for-ai-ml-and-hpc-part-2/In part one of this two-part series, Semiconductor Engineering Editor in Chief Ed Sperling and Rambus Sr. Director of Product Management Frank Ferro took a closer look at the various types of memory that system designers are using to support artificial intelligence (AI), machine learning (ML), and high-performance computing (HPC) applications. In this blog post, […]
AI Requires Tailored DRAM Solutions
https://go.rambus.com/ai-requires-tailored-dram-solutions-webinar#new_tabJoin Rambus for a webinar exploring how Dynamic Random Access Memory (DRAM) is a key enabler for Artificial Intelligence (AI). Featuring Frank Ferro, senior director of product management for memory interface IP at Rambus, and Shane Rau, research vice president, computing semiconductors at IDC, this webinar will cover the rapid advancement of AI and how […]
High-Performance Memory for AI/ML and HPC: Part 1
https://www.rambus.com/blogs/high-performance-memory-for-ai-ml-and-hpc-part-1/Semiconductor Engineering Editor in Chief Ed Sperling recently spoke with Rambus Sr. Director of Product Management Frank Ferro about designing high-performance memory subsystems for artificial intelligence (AI), machine learning (ML), and high-performance computing (HPC) applications. As Ferro notes, there is plenty of compute (CPU) power available today to support the above-mentioned markets. “[However], the advances […]
Rambus Reports First Quarter 2020 Financial Results
https://www.rambus.com/first-quarter-2020-financial-results/Excellent quarter, exceeding expectations for revenue and profit: GAAP revenue of $64.0 million; licensing billings of $67.1 million, product revenue of $30.7 million, and contract and other revenue of $13.6 million $37.3 million in cash provided by operating activities, further strengthening the balance sheet Record revenue from both the silicon IP and chip businesses, bolstered […]
Rambus Announces Complete 800G MACsec Solution for Enhanced Data Center and 5G Infrastructure Security
https://www.rambus.com/rambus-announces-complete-800g-macsec-solution-for-enhanced-data-center-and-5g-infrastructure-security/Highlights: Integrated hardware-based solution delivers full line-rate MACsec security at 100G to 800G data rates Supports multi-channel, multi-rate implementations with flexible bandwidth allocation Delivers enhanced data security for cloud, enterprise and carrier network applications as well as network-attached, high-performance computing (HPC) and AI/ML SUNNYVALE, Calif. – Apr. 29, 2020 – Rambus Inc. (NASDAQ: RMBS), a premier silicon IP and […]
Rambus Launches 800G MACsec Multi-Channel Engine
https://www.rambus.com/blogs/rambus-launches-800g-macsec-multi-channel-engine/Ethernet has become the ubiquitous communication solution from the desktop to the carrier network. In data centers at the heart of the network, the need to process and move an exponentially growing torrent of data has driven the rapid jumps in the performance of Ethernet. 800G Ethernet, officially unveiled earlier this month by the Ethernet […]
The Thermal Challenges of Moore’s Law: Part 2
https://www.rambus.com/blogs/the-thermal-challenges-of-moores-law-part-2/In part one of this two-part blog series, Semiconductor Engineering editor in chief Ed Sperling spoke with Steven Woo, Rambus fellow and distinguished inventor, about the relationship between Moore’s Law and the thermal challenges faced by the semiconductor industry. Specifically, Woo highlighted how the breakdown of Dennard scaling around 2005 prompted GPU designers to place […]
Anti-Tamper Cryptographic Cores
https://www.rambus.com/security/dpa-countermeasures/sca-resistant-cores/anti-tamper-cryptographic-cores/Security Anti-Tamper Cryptographic Cores Rambus DPA (Differential Power Analysis) Resistant Cryptographic hardware cores guard against the various side channel attacks that exploit unprotected cryptographic designs. Easily integrated into an ASIC or FPGA design, these cores resist tampering attacks attempting to obtain secret cryptographic key material through Differential Power Analysis (DPA), Differential Electromagnetic Analysis (DEMA) or […]
The Thermal Challenges of Moore’s Law: Part 1
https://www.rambus.com/blogs/the-thermal-challenges-of-moores-law-part-1/Semiconductor Engineering editor in chief Ed Sperling spoke with Steven Woo, Rambus fellow and distinguished inventor, about the relationship between Moore’s Law, Dennard scaling and thermal challenges. As Woo notes, there is a “tug of war” between the benefits that Moore’s Law provides and the breakdown of Dennard scaling in 2005. “Systems now need to […]
Memory a Key Enabler of Continued Advancement of AI/ML
https://www.rambus.com/blogs/memory-a-key-enabler-of-continued-advancement-of-ai-ml/Recently Rambus fellow and distinguished inventor, Steve Woo, had a web chat with Bill Wong, technology editor for Electronic Design, to discuss some of the latest hardware trends in AI/ML. This was part of an ongoing conversation Steve and Bill have had regarding leading-edge developments in the AI/ML revolution. In the webcast, Steve discusses some […]
