The CRYPT-IP-120 combines local key storage, an AES cipher (AES-IP-39), a SHA-2 hash (HASH-IP-57) and DMA capability into an easy to integrate, silicon-proven package. Designed for fast integration into SoCs, and featuring low gate count and full transforms, the CRYPT-IP-120 DMA crypto engine provides a reliable and cost-effective embedded solution for high speed processing pipelines.
Performance @ 500MHz
The CRYPT-IP-120 DMA crypto core provides hardware cryptographic algorithm implementations for optimal performance, user experience, battery lifetime and robust security.
The flexibility of the CRYPT-IP-120 architecture allows customization to individual requirements, including SNOW3G, Kasumi, AES-XTS and other basic IP modules.
|Control Interface||Simple register based control interface
Operation done interrupt
DMA done interrupt
AHB Master & Slave Interfaces5
|Local Key Store3|
|SHA||224, 256||224, 256, 384, 5122||224, 256, 384, 5122||224, 256|
|Gate Count (fab and process node-dependent)||49-53K|
Side-channel attacks conducted against electronic gear are relatively simple and inexpensive to execute. Such attacks include simple power analysis (SPA) and Differential Power Analysis (DPA). As all physical electronic systems routinely leak information, effective side-channel countermeasures should be implemented at the design stage to ensure protection of sensitive keys and data.