[Live on Feb 26] Quantum computing poses a paradigm-shifting threat to classical cryptographic systems, with the potential to break widely used encryption algorithms and compromise sensitive data. In this webinar, we will explore the emerging risks associated with quantum-capable adversaries and what it means to be “quantum safe.”
Secure by Design Series: Inline Memory Encryption & MACsec: Protecting Data in Use and in Motion
[Live on Feb 19] This webinar will examine two critical technologies that address these challenges: Inline Memory Encryption (IME) and MACsec (Media Access Control Security). We’ll explore how IME protects data as it moves between CPU and memory, defending against physical and side-channel attacks, while MACsec secures Layer 2 Ethernet communications against eavesdropping, replay, and man-in-the-middle threats.
Secure by Design: Tamper-Resistant Security: Hardening Systems Against Attack
[Live on Feb 12] This presentation will cover fundamentals of tamper-resistant security with a focus on the non-invasive attack technique of side-channel analysis (SCA). Included will be the fundamentals, prevention, and certification.
DDR5 PMIC5030 Product Brief
Download the product brief to see the specifications and features of the Rambus DDR5 PMIC5030.
Scaling AI Infrastructure with PCIe 7 and CXL 3
Interconnect technologies are key to scaling AI workloads across data center infrastructure. Learn how PCIe 7 and CXL 3 enable high-speed, low-latency connectivity for memory expansion and composable architectures in AI systems.
Memory IP for AI Accelerators: HBM4, LPDDR5, and GDDR7
AI accelerators require high-performance memory IP to meet bandwidth, capacity and latency requirements. This session dives into Rambus IP solutions for HBM4, LPDDR5, and GDDR7, highlighting their role in powering next-gen AI silicon.
