The data center landscape is undergoing a seismic shift. Driven by the explosive growth of hyperscale cloud computing, artificial intelligence (AI), and high-performance computing (HPC), Ethernet speeds are accelerating beyond 800G to 1.6T and even 3.2T. This evolution is fueled by breakthroughs in optical connectivity and the adoption of advanced silicon nodes (3nm and 2nm), enabling pluggable optical modules that support applications from short-reach (<10km) to long-haul (>500km).
As Ethernet scales to Terabit speeds, the need for robust, low-latency, and power-efficient security solutions becomes paramount. Traditional security architectures based on acceleration struggle to keep pace with these performance demands, creating a critical need for MACsec/IPsec solutions that can be integrated into Ethernet ports and operate at full line-rate across multiport and multi-rate environments.
Introducing the Rambus MACsec-IP-364 (+363) Engine
The Rambus Multi-Channel Engine MACsec-IP-364 (+363) is purpose-built to meet the demands of next-generation Ethernet. It delivers full line-rate MACsec and optional IPsec support for 1.6T and 3.2T Ethernet ports, offering a highly scalable and configurable solution for securing high-speed data traffic.
Key Capabilities
- Full Line-Rate Throughput: Supports 1.6T in 3nm and 3.2T in 3/2nm technologies, with low-power 800G operation in 5nm.
- Segmented Data Bus Architecture: Enables multiple packet processing per clock cycle, achieving breakthrough throughput.
- Flexible Integration: Supports channelized and port-based data paths, with options for buffering, flow control, and IEEE 1588 timestamping.
- High-speed Cryptography: FIPS-ready cryptographic engine supporting AES-ECB, AES-CTR, AES-GCM/GMAC transformations.
- MACsec and IPsec Support: Fully compliant with IEEE 802.1AE-2018, with optional IPsec ESP transport/tunnel modes.
Designed for Versatility
The MACsec-IP-364 (+363) engine is ideal for a wide range of applications, including:
- Optical PHYs
- Switch/router ASICs
- NPUs and Smart NICs
- 5G SoCs
- AI infrastructure with network-attached capabilities
Its multi-channel architecture supports up to 64 ports, with pooled classification and transformation resources that optimize multiport designs. The companion MACsec-IP-363 classifier enables autonomous MACsec processing or can be paired with external classifiers for customized deployments.
Seamless Integration and Support
Rambus provides a comprehensive integration package, including:
- Silicon IP and Driver Development Kit
- Hardware and programming manuals
- IP-XACT register descriptions
- UVM verification test bench and test vectors
- Setup, simulation, and synthesis scripts
This ensures a smooth path from evaluation to deployment, backed by world-class support from Rambus MACsec experts.
Securing Tomorrow’s Data Center
As Ethernet continues its march toward Terabit speeds, security must evolve in lockstep. The Rambus MACsec-IP-364 (+363) engine delivers the performance, flexibility, and scalability needed to secure the next generation of data center infrastructure—without compromising on latency, power, or throughput.
Learn more here.
Join us for the webinar, “Network Security at Terabit-per-second Rates with MACsec, IPsec and UEC“ on September 17, 2025 at 9:00am PT.
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