Ajay Jain, a director of product marketing at Rambus, recently told Semiconductor Engineering that LPDDR3 was the “workhorse” of the mobile memory market in 2014. According to Jain, LPDDR3 will retain its heavyweight status throughout most of 2015 before it is supplanted by next-gen LPDDR4.
“There are a couple of trends evolving in the mobile market as far as the user experience is concerned. One is that people are taking a lot more selfies and they are taking slow-motion video,” Jain explained.
“Slow-motion video is very memory intensive because from the camera, you are taking snapshots at a very, very high rate—120 or 240 frames per second. [This] pixel data needs to be stored in memory right away. It has to be buffered there, and the caches are not big enough to be able to hold that much data, so it’s got to make its way into memory.”
As Jain notes, the industry has addressed the above-mentioned issue by adding dual channels to LPDDR3, effectively increasing bandwidth capacity. The downside? Power consumption (and switching) jumps with the addition of a second channel, as does the price point.
Similar to slow-motion video, the rising popularity of 4K displays also poses additional challenges for LPDDR3.
“When you are talking [about such] high resolution, then your frame buffer still exists in memory,” said Jain. “That needs to be very high performance, very high bandwidth.”
Nevertheless, LPDDR3 will be widely deployed in 2015, with some savings expected for companies planning to roll out advanced features at a lower price point.
“Looking forward, we are beginning to see the first LPDDR4s [hitting the market],” Jain continued. “One of the major memory manufacturers has announced production and the really high-end phones will be the first ones to adopt those. The rest of the market, the second-tier vendors, expect to be able to get access to those devices in 2016.”
Despite the rising popularity of LPDDR4, Jain believes LPDDR3 will remain in use throughout 2016 and perhaps even 2017.
“In LPDDR4, they lowered the core voltage of the memory to 1.1volt and that ends up reducing power,” he added.
“The second thing they [implemented] was the low swing I/O (LVSTL), so that is on the order of 0.4 volts as opposed to the 1.2-volt swing. That is the second contributor to the power efficiency.”
Frank Ferro, a senior director of product management at Rambus, told Semiconductor Engineering that both servers and networking devices have traditionally used DDR3 technology on the infrastructure side of the market. Although it is a relatively straightforward transition from DDR3 to DDR4, there are also other technologies that are being leveraged, including LPDDR4.
“One of the interesting things about LPDDR4 and DDR4 is now you’re basically at the same speed and the same bandwidth,” Ferro explained.
“LP4 vendors have [already] started talking about an even higher speed grade of 4200MHz. Now, especially in the high end applications where they need bandwidth, manufacturers are beginning to look at LPDDR4.”
According to Ferro, the majority of customers in the server space will likely select DDR4 before evaluating alternative solutions, such as high-bandwidth memory (HBM) and Hybrid Memory Cube (HMC). The cost and physical design challenges of these new memory technologies will limit their deployment for the next few years
“The reality is that we have started seeing DDR4 deployment around the time of Intel’s Developer Forum (IDF) last August,” he concluded. “A number of server manufacturers started announcing use of the new Intel Xeon E5 with DDR4, [with] ARM also indicating plans for the server market.”
Interested in learning more about LPDDR4 adoption? You can check out the full text of “Higher Frequencies Mean More Memory” on Semiconductor Engineering here.
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