The Ultimate Guide to Secure Silicon webinar series focuses on cutting-edge design and implementation techniques for hardware security. This series is perfect for engineers and designers looking to strengthen their knowledge, stay current with the latest hardware security advancements and learn more about security IP solutions. This webinar will be focused on MACsec & IPsec, presented by Maxim Demchenko, Technical Director at Rambus.
The Ultimate Guide to Secure Silicon: MACsec & IPsec
The Ultimate Guide to Secure Silicon: Root of Trust
The Ultimate Guide to Secure Silicon webinar series focuses on cutting-edge design and implementation techniques for hardware security. This series is perfect for engineers and designers looking to strengthen their knowledge, stay current with the latest hardware security advancements and learn more about security IP solutions. This webinar will be focused on Root of Trust, presented by Parvez Shaik, Director of Product Management at Rambus.
Semiconductor Innovations Fueling The Growth Of AI 2.0
Businesses across industries are going all in on artificial intelligence (AI). Major tech companies have spent billions and plan to maintain, if not increase, their investments in AI. The International Data Corporation (IDC) predicts enterprise spending on generative AI, or AI 2.0, will reach $151.1 billion by 2027. AI’s growth has ushered in a new golden age of computer architecture, driving relentless demand for hardware innovation to deliver improvements in computational power.
AES-IP-3X SCA Resistant AES Accelerator Family Product Brief
The Rambus SCA-resistant AES-IP-3X family of crypto accelerator cores provide semiconductor manufacturers with superior AES cipher acceleration. The cores are easily integrated into ASIC/SoC and FPGA devices and offer a high-level of resistance to various Side Channel Attacks like Differential Power Analysis (DPA), and optionally offer detection of Fault Injection Attacks (FIA).
SCA Resistant Hardware Cores Product Brief
Rambus SCA (Side Channel Attack) Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through DPA (Differential Power Analysis) and against sabotage through FIA (Fault Injection Attacks) when integrated into an SoC. These superior performance cores are easily integrated into SoCs and FPGAs, providing robust side-channel resistance across different security and performance levels.
Ask the Experts: DDR5 Client Chipset
In this episode of Ask the Experts, we discuss DDR5 for client systems with John Eble, VP of Product Marketing, Memory Interface Chips at Rambus.
Topics discussed include:
- The need for advanced chipsets for DDR5 client DIMMs
- The role of the DDR5 Client Clock Driver (CKD) and its use cases
- The AI applications driving the need for greater memory performance in client systems
