There are many challenges to achieving good “memory security,” especially in that the term “memory” could refer to on-chip SRAM, embedded non-volatile memory, or even off-chip memory (e.g., both DRAM or mass-storage non-volatile). We refer to data within non-executable NVM to be “data at rest,” while data within volatile memory like SRAM or DRAM to be “data in use.” In both domains, data within these memories is of interest to an adversary – it has either immediate value (e.g., passwords, secret keys, AI/ML datasets, etc.), or it can indirectly lead to exposure of those valuable assets. This presentation will focus on the key aspects of memory security for data-in-use applications: 1) data privacy, 2) data authenticity, and 3) data freshness, and how those security aspects weigh against critical performance metrics including latency and memory overhead.
Memory Encryption Solutions for Protecting Data in Use
Securing the Semiconductor Supply Chain with Silicon Provisioning and Cloud Key Management
Building Trust Through Certification of Security Solutions
The Growing Importance of Network Security at Full Line-rate with IPsec and MACsec
Securing Data in Motion with Hardware Security Engines
In modern communication networks, and especially moving to zero trust environments, all communication channels, including local memory interfaces must be secured. Hardware acceleration is essential to ensure the impact on performance, latency and power consumption is minimal and fundamental system operation is not degraded by the addition of security overhead. Gijs Willemse will discuss the architectural advantages, and in many use cases the necessity, for hardware-based encryption engines.

