As per socket compute density increases, the amount of directly accessible, low-latency memory bandwidth and capacity to adequately feed data to the multiple cores needs to scale accordingly. Scaling memory bandwidth by increasing raw DRAM component bandwidth or by increasing the number of memory channels has challenges and is reaching limits. JEDEC has unveiled the development of a new DIMM technology called Multiplexed Rank Dual Inline Memory Modules (MRDIMM) to address the bandwidth challenge.
Expanding Server Memory Capabilities with MRDIMM Technology
Client DIMM Power Management IC (PMIC5100) Product Brief
Download the product brief to learn how the Rambus PMIC5100 (P1535Gxx) enables client UDIMMs, CUDIMMs, SODIMMs and CSODIMMs. With the Rambus Client Clock Driver and SPD Hub ICs, it comprises a complete memory interface chipset for client DIMMs.
DDR5 MRCD and MDB Product Brief
Download the product brief to learn more about the Rambus DDR5 Multiplexed Registering Clock Driver (MRCD) and Multiplexed Data Buffer (MDB).
Defense-grade Root of Trust Solutions
This webinar will examine defense-grade RoT architectures designed to meet the rigorous security, resiliency, and assurance requirements of federal environments.
Fundamentals of Tamper-Resistant Security
This presentation will cover fundamentals of tamper-resistant security with a focus on the non-invasive attack technique of side-channel analysis (SCA). Included will be the fundamentals, prevention, and certification.
Data Centers 2.0: How AI Is Transforming Operations
Rapid advancements in AI are becoming commonplace, driven by large language models (LLMs) that now exceed 1 trillion parameters. While these AI models are revolutionizing many industries, their increasing demand for computational power is driving the need for more specialized and higher-performance infrastructure.
