File encryption, file system encryption and full disk encryption (FDE) are methods offered by the industry to allow users to protect their data stored on non-volatile storage devices, such as Solid State Disks (SSD). The main feature of FDE is to protect stored system and user date from unauthorized reading, writing, alteration, moving or rolling back. However, extended security features are key to securing FDE implementation.
Papers
Architecting a Hardware-Managed Hybrid DIMM Optimized for Cost/Performance
Rapidly evolving workloads and exploding data volumes place great pressure on data-center compute, IO, and memory performance, and especially on memory capacity. Increasing memory capacity requires a commensurate reduction in memory cost per bit. DRAM technology scaling has been steadily delivering affordable capacity increases, but DRAM scaling is rapidly reaching physical limits. Other technologies such as Flash, enhanced Flash, Phase Change Memory, and Spin Torque Transfer Magnetic RAM hold promise for creating high capacity memories at lower cost per bit. However, these technologies have attributes that require careful management.
Interac: Securing Canada’s Mobile Payments
Download Interac®: Securing Canada’s Mobile Payments to learn how Interac utilizes tokenization technology to combat fraud and stay at the forefront of payments technology.
Case study overview:
- Learn about the customer challenge
- See the results and benefits after implementing tokenization technology
To learn more about the Rambus Token Service Provider, please click here.
Do Superconducting Processors Really Need Cryogenic Memories? The Case for Cold DRAM
Cryogenic, superconducting digital processors offer the promise of greatly reduced operating power for server-class computing systems. This is due to the exceptionally low energy per operation of Single Flux Quantum circuits built from Josephson junction devices operating at the temperature of 4 Kelvin. Unfortunately, no suitable same-temperature memory technology yet exists to complement these SFQ logic technologies. Possible memory technologies are in the early stages of development but will take years to reach the cost per bit and capacity capabilities of current semiconductor memory. We discuss the pros and cons of four alternative memory architectures that could be coupled to SFQ-based processors. Our feasibility studies indicate that cold memories built from CMOS DRAM and operating at 77K can support superconducting processors at low cost-per-bit, and that they can do so today.
Monetizing Semiconductors: From Silicon to Service
Over the past five years, the semiconductor industry has faced a number of complex challenges. These include increased development costs, eroded ASPs, market saturation and heightened, yet unsustainable M&A activity. As 2018 begins, the semiconductor industry continues to seek a return to stability and organic growth within the parameters of a new business paradigm that is both viable and collaborative. Within this context, semiconductor companies are acknowledging the potential of new markets and downstream revenue opportunities as they explore a more comprehensive “silicon to services” model that spans the data center to the mobile edge. This includes end-to-end IoT security solutions and PaaS-based services such as in-field feature configuration, advanced analytics, predictive maintenance alerts, self-learning algorithms and intelligent, proactive interaction with customers. In addition to services, the concept of open-source hardware and building silicon from disaggregated, pre-verified chiplets is beginning to gain traction as companies move to slash costs and reduce time-to-market for heterogeneous designs. Specific strategies to unlocking the full potential of semiconductors will undoubtedly vary, which is why it is important for us to explore a future in which the industry, along with various research organizations and government offices, plays an open and collaborative role in helping to sustainably monetize both silicon and services.
Protecting Electronic Systems from Side-Channel Attacks
Side-channel attacks conducted against electronic systems are relatively simple and inexpensive to execute. An attacker does not need to know specific implementation details of the cryptographic device to perform these attacks and extract keys. As all physical electronic systems routinely leak information, effective side-channel countermeasures such as Rambus’ DPA Resistant Hardware Cores (DPARC) or DPA Software Library (DPASL) should be implemented at the design stage to ensure protection of sensitive keys and data. After the implementation of hardware or software countermeasures, systems should be carefully evaluated with a Test Vector Leakage Assessment (TVLA) platform such as the Rambus DPA Workstation (DPAWS) to confirm the cessation of sensitive side-channel leakage.
