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Gary Hilson of the EE Times has written a detailed article about Rambus’ 56G SerDes PHY. As Hilson notes, the analog-to-digital converter (ADC) and (DSP) architecture of Rambus’ 56G SerDes PHY is designed meet the long-reach backplane requirements for the industry transition to 400 GB Ethernet applications. This means it can support scaling to speeds […]
Revenue of $97.4 million, up 34% year over year GAAP diluted net income per share of $0.03; non-GAAP diluted net income per share of $0.17 Licensed Western Digital for memory and security innovations Launched Unified Payment Platform, extending mobile OEM pay to retailers SUNNYVALE, Calif. – April 24, 2017 – Rambus Inc. (NASDAQ:RMBS) today reported […]
Rambus has confirmed that its recently launched 56G SerDes PHY will be developed on Samsung’s 10nm LPP (Low-Power Plus) process technology. According to Luc Seraphin, senior vice president and general manager of the Rambus Memory and Interfaces Division, the 56G SerDes PHY delivers enterprise-class performance across the challenging signaling environments typical of high-speed communication systems […]
Solution brings scalable ADC-based architecture quickly to networking market, supporting transition to 400GbE Ethernet SUNNYVALE, Calif. – April 20, 2017 – Rambus Inc. (NASDAQ:RMBS) today announced that it is partnering with Samsung Electronics for its recently launched 56G SerDes PHY to be developed on Samsung’s 10nm LPP (Low-Power Plus) process technology. The industry-leading 56G SerDes PHY […]
Earlier this week, Rambus confirmed that it had signed a broad patent license agreement with Western Digital Corporation. According to Luc Seraphin, senior VP and general manager of the Memory and Interfaces division at Rambus, the agreement covers the use of patented Rambus memory technologies, including high-speed interfaces, memory architectures, resistive memory and security technologies, […]
High-performance, power-efficient memory solution designed for today’s data centers SUNNYVALE, Calif. – February 7, 2017 – Rambus Inc. (NASDAQ: RMBS) today announced the availability of its High Bandwidth Memory (HBM) Gen2 PHY developed for GLOBALFOUNDRIES high-performance FX-14TM ASIC Platform. Built on the GLOBALFOUNDRIES 14nm FinFET (14LPP) process technology, the Rambus HBM PHY is aimed at […]
Last week, we announced the launch of our 56G Multi-protocol SerDes (MPS) PHY developed on second-gen FinFET (Fin Field Effect Transistor) process technology. With a scalable ADC-based (analog-to-digital converter) architecture, the 56G SerDes FinFET PHY provides both PAM-4 and NRZ signaling, offering a flexible solution that addresses the needs of long-reach backplane requirements as the […]
Rambus has announced a 56G Multi-protocol SerDes (MPS) PHY developed on second-gen FinFET (Fin Field Effect Transistor) process technology to meet the evolving demands of communications and data center applications. With a scalable ADC-based (analog-to-digital converter) architecture, the 56G SerDes FinFET PHY provides both PAM-4 and NRZ signaling, offering a flexible solution that addresses the […]
Scalable architecture paves the way for transition to 400GbE Ethernet SUNNYVALE, Calif. – February 1, 2017 – Rambus Inc. (NASDAQ:RMBS) today announced its industry-leading 56G SerDes PHY which delivers enterprise-class performance across the challenging signal environments typical of high-speed communication systems. Developed on cutting-edge second generation FinFET (Fin Field Effect Transistor) process technology, this solution meets […]
The DesignCon 2017 expo kicks off on February 2nd in Santa Clara. We’re at booth #833, showcasing our comprehensive suite of Ethernet, PCIe and DDRn IP solutions to solve today’s most challenging data center and networking needs. Rambus technical experts, executives and partners will also be holding a series of talks and technical training sessions […]