At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer.
Found 315 Results
Integrated Reorder Functionality
https://www.rambus.com/chip-interface-ip-glossary/integrated-reorder-functionality/Integrated Reorder Functionality refers to a hardware or firmware feature embedded within high-speed data transmission systems that dynamically reorders out-of-sequence data packets or transactions to restore their original order before processing. This functionality is critical in systems where data may arrive out of order due to parallelism, pipelining, or multi-path routing, common in protocols like PCI Express (PCIe), Compute Express Link (CXL), and Network-on-Chip (NoC) architectures.
ECC (Error Correction Code)
https://www.rambus.com/chip-interface-ip-glossary/ecc/Error Correction Code (ECC) is a method of detecting and correcting data corruption in digital systems. It ensures data integrity by adding redundant bits to data transmissions or storage, allowing the system to identify and correct errors without needing retransmission. ECC is widely used in memory modules, storage devices, communication systems, and high-reliability computing environments.
Crosslink
https://www.rambus.com/chip-interface-ip-glossary/crosslink/In the context of programmable logic and FPGA (Field Programmable Gate Array) architectures, Crosslink refers to a class of low-power, high-performance FPGAs designed to enable efficient bridging and interfacing between multiple high-speed data protocols, especially in embedded vision and edge AI applications.
AXI (Advanced eXtensible Interface)
https://www.rambus.com/chip-interface-ip-glossary/axi/AXI is a high-performance, high-frequency bus protocol defined as part of the ARM AMBA (Advanced Microcontroller Bus Architecture) specification. It is designed to facilitate efficient communication between components in system-on-chip (SoC) architectures, such as processors, memory controllers, and peripherals.
MIPI: Powering the Future of Connected Devices
https://www.rambus.com/blogs/mipi-powering-the-future-of-connected-devices/From the first monochrome mobile displays to today’s ultra-high-definition automotive dashboards and immersive AR/VR headsets, MIPI technology has quietly become the backbone of modern data connectivity. Let’s explore how MIPI standards have evolved, the markets they serve, and why Rambus is at the forefront of this transformation. Table of Contents: What does MIPI stand for? […]
Post-quantum Cryptography (PQC): New Algorithms for a New Era
https://www.rambus.com/blogs/post-quantum-cryptography-pqc-new-algorithms-for-a-new-era/[Updated April 14, 2025] Post-Quantum Cryptography (PQC), also known as Quantum Safe Cryptography (QSC), refers to cryptographic algorithms designed to withstand attacks by quantum computers. Quantum computers will eventually become powerful enough to break public key-based cryptography, also known as asymmetric cryptography. Public key-based cryptography is used to protect everything from your online communications to […]
Hardware Root of Trust: Everything you need to know
https://www.rambus.com/blogs/hardware-root-of-trust/[Last updated on April 8, 2025] A root of trust is the security foundation for an SoC, other semiconductor device or electronic system. However, its meaning differs depending on who you ask. From our perspective, the hardware root of trust contains the keys for cryptographic functions and is usually a part of the secure boot […]
Rambus CXL IP: A Journey from Spec to Compliance
https://www.rambus.com/blogs/rambus-cxl-ip-a-journey-from-spec-to-compliance/[Updated April 7, 2025] With the ongoing efforts of the Rambus engineering team, we have now achieved compliance to CXL 2.0 with our CXL Controller IP, and it has been added to the Integrators List. Company Name Product Name Device ID Device Type Feature Set Spec Revision PHY Speed Max Lane Form Factor Function Compliance […]
CryptoManager Hub (CH-7xx) and CryptoManager Core (CC-7xx) ISO 21434 Automotive-grade
https://www.rambus.com/security/root-of-trust/ch-7xx-and-cc-7xx/CryptoManager Hub (CH-7xx) and CryptoManager Core (CC-7xx) ISO 21434 Automotive-grade Foundational Crypto Accelerator Cores for Automotive Use Cases Contact Us The automotive-grade CryptoManager Hub (CMH) and CryptoManager Core (CMC) from Rambus are the next-generation of flexible and configurable cryptographic family of accelerator cores comprised of the CMH CH-7xx and CMC CC-7xx designs and are intended […]
CryptoManager Hub (CH-6xx) and CryptoManager Core (CC-6xx)
https://www.rambus.com/security/root-of-trust/ch-6xx-and-cc-6xx/CryptoManager Hub (CH-6xx) and CryptoManager Core (CC-6xx) Foundational Crypto Accelerator Cores Contact Us CryptoManager Hub (CMH) and CryptoManager Core (CMC) from Rambus are the next-generation of flexible and configurable cryptographic family of accelerator cores comprised of the CMH CH-6xx and CMC CC-6xx designs and are intended for embedding in customer or Rambus provided Root of […]
