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Found 315 Results
PKE-IP-85 Public Key Engine Family Product Brief
https://go.rambus.com/pke-ip-85-product-brief#new_tabThe Rambus SCA-resistant PKE-IP-85 family of Public Key Engine cores provide semiconductor manufacturers with superior public key cryptography acceleration. The cores are easily integrated into ASIC/SoC and FPGA devices, offer a high-level of resistance to Differential Power Analysis (DPA), and, optionally, offer detection of Fault Injection Attacks (FIA).
PKE-IP-85 Public Key Engine Family
https://www.rambus.com/security/crypto-accelerator-cores/pke-ip-85/PKE-IP-85 Public Key Engine Family Contact Us The Rambus SCA-resistant PKE-IP-85 family of Public Key Engine cores provide semiconductor manufacturers with superior public key cryptography acceleration. The cores are easily integrated into ASIC/SoC and FPGA devices, offer a high-level of resistance to Differential Power Analysis (DPA), and, optionally, offer detection of Fault Injection Attacks (FIA). […]
PCIe 7.0 Switch
https://www.rambus.com/interface-ip/pci-express/pcie7-switch/PCIe 7.0 Switch Contact Us The Rambus PCI Express® (PCIe®) 7.0 Switch is a customizable, multiport embedded switch for PCIe with TDM support designed for ASIC and FPGA implementations. It enables the connection of one upstream port and multiple downstream ports as a fully configurable interface subsystem. It is backward compatible to PCIe 6.3 and […]
PCIe 7.0 Retimer Controller with CXL Support
https://www.rambus.com/interface-ip/pci-express/pcie7-retimer-controller/PCIe 7.0 Retimer Controller with CXL Support Contact Us PCI Express® (PCIe®) 7.0 links operating at 128 GT/s using PAM4 signaling have a reach of up to 13 inches at nominal conditions on standard PCBs. Extending trace routing beyond this distance results in higher first bit error rates (FBER) and reduced link efficiency due to […]
PCIe 7.0 Controller
https://www.rambus.com/interface-ip/pci-express/pcie7-controller/PCIe 7.0 Controller Contact Us The Rambus PCI Express® (PCIe®) 7.0 Controller is a configurable and scalable design for ASIC implementations. Optimized for high-bandwidth efficiency at data rates up to 128 GT/s, the controller delivers maximum performance for Data Center, Edge, AI/ML and HPC applications. It is backward compatible to the PCIe 6.3 and 5.0, […]
Rambus Unveils PCIe 7.0 IP Portfolio for High-Performance Data Center and AI SoCs
https://www.rambus.com/blogs/rambus-unveils-pcie-7-0-ip-portfolio-for-high-performance-data-center-and-ai-socs/The relentless innovation in Artificial Intelligence (AI) and High-Performance computing (HPC) demands a cutting-edge hardware infrastructure capable of handling unprecedented data loads. To overcome these challenges and usher in a new era of performance, Rambus is proud to announce the launch of our PCI Express® (PCIe®) 7.0 IP portfolio, encompassing a comprehensive suite of IP […]
PCIe 7.0 Switch Product Brief
https://go.rambus.com/pcie7-switch-product-brief#new_tabThe Rambus PCI Express® (PCIe) 7.0 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC and FPGA implementations. It enables the connection of one upstream port and multiple downstream ports as a fully configurable interface subsystem. It is backward compatible to PCIe 5.0.
New CXL 3.1 Controller IP for Next-Generation Data Centers
https://www.rambus.com/blogs/new-cxl-3-1-controller-ip-for-next-generation-data-centers/The AI boom is giving rise to profound changes in the data center; compute-intensive workloads are driving an unprecedented demand for low latency, high-bandwidth connectivity between CPUs, accelerators and storage. The Compute Express Link® (CXL®) interconnect offers new ways for data centers to enhance performance and efficiency. As data centers grapple with increasingly complex AI […]
Data Center Evolution: The Leap to 64 GT/s Signaling with PCI Express 6.1
https://go.rambus.com/the-leap-to-64gts-signaling-with-pcie6#new_tabThe PCI Express® (PCIe®) interface is the critical backbone that moves data at high bandwidth and low latency between various compute nodes such as CPUs, GPUs, FPGAs, and workload-specific accelerators. With the torrid rise in bandwidth demands of advanced workloads such as AI/ML training, PCIe 6.1 jumps signaling to 64 GT/s with some of the […]
Compute Express Link (CXL): All you need to know
https://www.rambus.com/blogs/compute-express-link/[Last updated on: January 23, 2024] In this blog post, we take an in-depth look at Compute Express Link®™ (CXL®™), an open standard cache-coherent interconnect between processors and accelerators, smart NICs, and memory devices. We explore how CXL can help data centers more efficiently handle the tremendous memory performance demands of generative AI and other advanced workloads. […]
