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Compute Express Link (CXL) Controller IP Delivering high-bandwidth cache-coherent interconnect performance Contact Us CXL Controller IP Rambus high-performance Compute Express Link® (CXL®) 3.0 and 2.0 controllers are optimized for use in SoCs, ASICs and FPGAs. These industry-leading solutions for high-performance interfaces address AI/ML, data center and edge applications. Explore ProductsCXL ControllerCCIX ControllerCXL Interconnect Subsystem Version […]
PCI Express (PCIe) Controller IP Delivering high-bandwidth interconnect performance Contact Us PCI Express Controller IP Rambus silicon-proven, high-performance PCI Express® (PCIe®) 7.0, 6.1, 5.0, 4.0 and earlier generation digital controllers are optimized for use in SoCs, ASICs and FPGAs. These market-leading solutions for high-performance interfaces address AI/ML, data center and edge applications. Explore ProductsPCIe ControllerPCIe […]
Cryptography Research at Rambus Silicon IP solutions for defense-grade SoCs, ASICs, and FPGA systems Cryptography Research at Rambus understands the importance of delivering both the performance needed by military hardware and the means to ensure the data processed, stored and communicated remains secure. Our industry-leading security and interface IP solutions make possible faster, more secure, […]
Learn everything you need to know about VESA Display Stream Compression (DSC), simply explained in our blog. Start reading! Display technology has advanced in leaps and bounds over the past decade. Electronics manufacturers have been using increasingly sophisticated display features as a way of differentiating their products in the highly competitive consumer electronics market. Each […]
What products achieved PCIe 5.0 compliance? At the most recent PCI-SIG® Compliance Workshop held in Burlingame, CA, Rambus achieved PCIe 5.0 compliance for two products: PCIe 5.0 Controller IP, which is fully backward compatible to PCIe 4.0 and PCIe 3.1/3.0. It was certified at PCIe 5.0 x4 operating at 32 GT/s as an Endpoint controller […]
CXL Glossary A glossary of CXL IP terminology and relevant solutions. a | b | c | d | e | f | g | h | i | j | k | l | m | n | o | p | q | r | s | t | u | v | w […]
While server virtualization is being widely deployed in an effort to reduce costs and optimize data center resource usage, an additional key area where virtualization has an opportunity to shine is in the area of I/O performance and its role in enabling more efficient application execution. Single Root I/O Virtualization (SR-IOV) provides a step forward […]
PCIe 6.0 Retimer Controller with CXL Support Contact Us PCI Express® (PCIe®) 6.0 links operating at 64 GT/s using PAM4 signaling have a reach of up to 13 inches at nominal conditions on standard PCBs. Extending trace routing beyond this distance results in higher first bit error rates (FBER) and reduced link efficiency due to […]
The Rambus VESA® Display Stream Compression (DSC) decoder IP core for AMD Xilinx FPGAs deliver visually lossless video compression performance, enabling designers to handle the growing bandwidth requirements of cutting-edge displays with higher resolutions, faster refresh rates, and greater pixel depths.
The Rambus VESA® Display Stream Compression (DSC) decoder IP core for Intel FPGAs deliver visually lossless video compression performance, enabling designers to handle the growing bandwidth requirements of cutting-edge displays with higher resolutions, faster refresh rates, and greater pixel depths.