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Rambus to Acquire Northwest Logic, Extending Leadership in Interface IP

https://www.rambus.com/rambus-to-acquire-northwest-logic/

Highlights: Complementary product portfolio of PHYs and controllers further accelerates Rambus growth Expands solutions for data center, artificial intelligence (AI), machine learning (ML), communications and automotive applications Combined offerings, including HBM2, GDDR6, DDR4 and PCI Express (PCIe), create one-stop-shop for SoC designers SUNNYVALE, Calif. and HILLSBORO, Ore. – July 29, 2019 – Rambus Inc. (NASDAQ: […]

What About AI Regulations?

https://www.rambus.com/blogs/what-about-ai-regulations/

These days, there’s considerable talk and hoopla surrounding artificial intelligence/AI.  Tech companies on a worldwide basis are talking about how their products are complying with AI requirements. And that includes Rambus with its lineup of new GDDR6 and HBM2 PHYs. These products provide SoC and system designers the right solutions to move onward with next […]

eSilicon Tapes Out 7nm Combo PHY (HBM2/HBM2E/Low Latency) Test Chip

https://www.rambus.com/esilicon_combo_phy_hbm2_hbm2e_low_latency/

Chip facilitates continued support of the latest HBM technologies for eSilicon’s 2.5D FinFET ASICs SAN JOSE, Calif. — May 9, 2019 — eSilicon, a leading provider of FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, announced today the tapeout of a 7nm test chip to provide silicon validation of its physical interface (PHY) […]

Understanding ML and ANN memory requirements

https://www.rambus.com/blogs/understanding-ml-and-ann-memory-requirements/

Written by Steven Woo Artificial Neural Networks First proposed in 1944 by Warren McCullough and Walter Pitts, an artificial neural network (ANN) or more commonly, a neural network (NN), can perhaps best be defined as a computational model that attempts to closely emulate the network of neurons present in the human brain. More specifically, neuromorphic […]

IDC White Paper Lays Out Future of Memories and Interfaces

https://www.rambus.com/blogs/idc-white-paper-lays-out-future-of-memories-and-interfaces/

A recently published IDC white paper calls attention to the growing significance of chip connectivity.  Entitled, “Hidden Signals: The Memories and Interfaces Enabling IoT, 5G, and AI,” the paper states that data created by electronic systems will grow 10x to 103 zettabytes between 2014 to 2023.  Moreover, it says the average server will support over […]

HBM2 gets an upgrade as semiconductor industry eyes HBM3

https://www.rambus.com/blogs/hbm2-gets-an-upgrade-as-semiconductor-industry-eyes-hbm3/

JEDEC recently updated its JESD235 High Bandwidth Memory (HBM) DRAM standard. As we’ve previously discussed on Rambus Press, HBM DRAM supports a wide range of use cases and verticals including graphics (GPUs), high performance computing (HPC), servers, networking and client applications. Indeed, HBM is particularly suitable for hardware that demands peak bandwidth, bandwidth per watt […]

Rambus Captures 3 Top Spots in Semi Engineering’s 2018 Top Tech Talks

https://www.rambus.com/blogs/rambus-captures-3-top-spots-in-semi-engineerings-2018-top-tech-talks/

Kudos go to Rambus for scoring three big wins in Semiconductor Engineering’s 2018 Top Tech Talks. Semi Engineering staffer Linda Christensen reported on its site’s videos that had the most traffic and why. The three Rambus videos were presented by Frank Ferro, Sr. Director, Product Marketing for Memory and Interfaces Division, Steve Woo, Vice President, Systems […]

Six Top Rambus IP Core Training Sessions Slated for DesignCon 2019

https://www.rambus.com/blogs/six-top-rambus-ip-core-training-sessions-slated-for-designcon-2019/

Some of the top Rambus technical experts will hold forth at DesignCon 2019 in a full-day sponsored training session on Wednesday, January 30. Plus, the Rambus booth #837 will demonstrate the company’s developments in GDDR6, as well as its comprehensive suite of Ethernet, PCIe, DDR, and HBM IP cores for today’s most challenging data center and […]

Mixel MIPI C-PHY/D-PHY Combo IP integrated into Synaptics VXR7200 IC enabling next generation VR headsets

https://www.rambus.com/northwest-logic-d-phy-c-phy-mipi-solution-used-in-mixel-solution-pr/

C-PHY adoption accelerating beyond Camera and into Display applications San Jose, CA – October 11th, 2018 – Mixel® Inc., a leader in mixed-signal intellectual property (IP), and Synaptics Incorporated, a leading developer of human interface solutions, today announced that Mixel MIPI® IP has been successfully integrated into Synaptics’ VXR7200 DisplayPort to Dual MIPI VR Bridge IC. The […]

Controllers Newsletter – Q3/Q4 2018

https://www.rambus.com/controllers-newsletter-q3-q4-2018/

Northwest Logic and Rambus Present Cutting Edge HBM2 and GDDR6 Solutions Webinar Please join us as we discuss the features, benefits and availability of our cutting edge HBM2 and GDDR6 solutions.  These fully integrated controller and PHY solutions are optimized to meet the needs of high-performance applications including machine learning, data mining, and networking. When: […]

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