Found 583 Results

SoC (System on Chip)

https://www.rambus.com/chip-interface-ip-glossary/system-on-chip/

A System on Chip (SoC) is an integrated circuit that consolidates all essential components of a computer or electronic system, including CPU, GPU, memory controllers, I/O interfaces, and often specialized accelerators, onto a single chip

Parity Protection

https://www.rambus.com/chip-interface-ip-glossary/parity-protection/

Parity Protection Table of Contents Definition How it Works Features Benefits Enabling Technologies Rambus Technologies What is Parity Protection? Parity Protection is a fundamental error detection technique used in digital systems to identify single-bit errors in data storage or transmission. It works by appending a parity bit to a data word, which indicates whether the […]

Multi-Function

https://www.rambus.com/chip-interface-ip-glossary/multi-function/

Multi-function enables a single PCIe device to perform multiple roles, improving integration, scalability, and virtualization in modern computing systems.

Data Bus Inversion (DBI)

https://www.rambus.com/chip-interface-ip-glossary/dbi/

Data Bus Inversion (DBI) is a signal encoding technique used in high-speed digital interfaces to reduce power consumption and improve signal integrity. DBI works by inverting data bits when the number of logical transitions (from 0 to 1 or vice versa) exceeds a predefined threshold, typically half the bus width. A control signal indicates whether inversion has occurred, allowing the receiver to correctly interpret the data.

MIPI: Powering the Future of Connected Devices

https://www.rambus.com/blogs/mipi-powering-the-future-of-connected-devices/

From the first monochrome mobile displays to today’s ultra-high-definition automotive dashboards and immersive AR/VR headsets, MIPI technology has quietly become the backbone of modern data connectivity. Let’s explore how MIPI standards have evolved, the markets they serve, and why Rambus is at the forefront of this transformation. Table of Contents: What does MIPI stand for? […]

All You Need to Know About GDDR7

https://www.rambus.com/blogs/all-you-need-to-know-about-gddr7/

In this blog post, we explore everything you need to know about Graphics Double Data Rate, most commonly known as GDDR. Since its introduction in 2000, GDDR has become the primary memory technology for graphics cards, evolving through several generations—from GDDR2 up to the latest GDDR7—to provide ever-increasing speed and efficiency for advanced visual and […]

Power Management ICs for Client Memory Modules (DDR5 PMIC and LPCAMM2 PMIC)

https://www.rambus.com/memory-interface-chips/ddr5-client-dimm-chipset/ddr5-client-pmics/

Power Management ICs for Client Memory Modules (DDR5 PMIC and LPCAMM2 PMIC) Contact Us Rambus PMICs for client memory modules enable a broad range of form factors, performance and capacity configurations. The PMIC5120 supports DDR5 SODIMMs, CSODIMMs, UDIMMs and CUDIMMs. The PMIC5200 supports LPCAMM2, the new compression-attach memory module form factor for LPDDR5. Description Part […]

LPCAMM2 Client Chipset

https://www.rambus.com/memory-interface-chips/lpcamm2-client-chipset/

LPCAMM2 Client Chipset Delivering the performance of LPDDR5 in a revolutionary module form factor Contact Us LPCAMM2 Power Management IC and SPD Hub Chips The Rambus LPCAMM2 memory interface chipset for clients includes a Power Management IC (PMIC) and Serial Presence Detect Hub (SPD Hub). These chips enable the revolutionary LPCAMM2 form factor for PCs […]

Hardware Root of Trust: Everything you need to know

https://www.rambus.com/blogs/hardware-root-of-trust/

[Last updated on April 8, 2025] A root of trust is the security foundation for an SoC, other semiconductor device or electronic system. However, its meaning differs depending on who you ask. From our perspective, the hardware root of trust contains the keys for cryptographic functions and is usually a part of the secure boot […]

CryptoManager Hub (CH-6xx) and CryptoManager Core (CC-6xx)

https://www.rambus.com/security/root-of-trust/ch-6xx-and-cc-6xx/

CryptoManager Hub (CH-6xx) and CryptoManager Core (CC-6xx) Foundational Crypto Accelerator Cores Contact Us CryptoManager Hub (CMH) and CryptoManager Core (CMC) from Rambus are the next-generation of flexible and configurable cryptographic family of accelerator cores comprised of the CMH CH-6xx and CMC CC-6xx designs and are intended for embedding in customer or Rambus provided Root of […]

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