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Post-quantum Cryptography (PQC): New Algorithms for a New Era

https://www.rambus.com/blogs/post-quantum-cryptography-pqc-new-algorithms-for-a-new-era/

[Updated April 14, 2025] Post-Quantum Cryptography (PQC), also known as Quantum Safe Cryptography (QSC), refers to cryptographic algorithms designed to withstand attacks by quantum computers. Quantum computers will eventually become powerful enough to break public key-based cryptography, also known as asymmetric cryptography. Public key-based cryptography is used to protect everything from your online communications to […]

PCIe 6.2 Switch

https://www.rambus.com/interface-ip/pci-express/pcie6-2-switch/

PCIe 6.2 Switch Contact Us The Rambus PCI Express® (PCIe®) 6.2 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC implementations. It enables the connection of one upstream port and multiple downstream ports as a fully configurable interface subsystem. It is backward compatible to PCIe 5.0.ContactProduct Brief How the PCIe 6.2 Switch […]

PKE-IP-85 Public Key Engine Family

https://www.rambus.com/security/crypto-accelerator-cores/pke-ip-85/

PKE-IP-85 Public Key Engine Family Contact Us The Rambus SCA-resistant PKE-IP-85 family of Public Key Engine cores provide semiconductor manufacturers with superior public key cryptography acceleration. The cores are easily integrated into ASIC/SoC and FPGA devices, offer a high-level of resistance to Differential Power Analysis (DPA), and, optionally, offer detection of Fault Injection Attacks (FIA). […]

PCIe 7.0 Switch

https://www.rambus.com/interface-ip/pci-express/pcie7-switch/

PCIe 7.0 Switch Contact Us The Rambus PCI Express® (PCIe®) 7.0 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC and FPGA implementations. It enables the connection of one upstream port and multiple downstream ports as a fully configurable interface subsystem. It is backward compatible to PCIe 5.0. ContactProduct Brief How the […]

PCIe 7.0 Retimer Controller with CXL Support

https://www.rambus.com/interface-ip/pci-express/pcie7-retimer-controller/

PCIe 7.0 Retimer Controller with CXL Support Contact Us PCI Express® (PCIe®) 7.0 links operating at 128 GT/s using PAM4 signaling have a reach of up to 13 inches at nominal conditions on standard PCBs. Extending trace routing beyond this distance results in higher first bit error rates (FBER) and reduced link efficiency due to […]

PCIe 7.0 Controller

https://www.rambus.com/interface-ip/pci-express/pcie7-controller/

PCIe 7.0 Controller Contact Us The Rambus PCI Express® (PCIe®) 7.0 Controller is a configurable and scalable design for ASIC implementations. Optimized for high-bandwidth efficiency at data rates up to 128 GT/s, the controller delivers maximum performance for Data Center, Edge, AI/ML and HPC applications. It is backward compatible to the PCIe 6.0 and 5.0, […]

DDR5 Memory Interface Chips on the latest Ask the Experts

https://www.rambus.com/blogs/ask-the-experts-ddr5-memory-interface-chips/

In this episode of “Ask the Experts,” John Eble, Vice President of Product Marketing for Memory Interface Chips at Rambus, discusses advancements in DDR5 Server RDIMM memory modules. Eble highlights the four critical logic components of DDR5 RDIMMs, two of which are enhanced versions of chips used in DDR4 memory modules, and two are new. […]

Exploring the Impact of AI 2.0 on the Memory Landscape

https://www.rambus.com/blogs/exploring-the-impact-of-ai-2-0-on-the-memory-landscape/

Ask the Experts Interview with Dr. Steven Woo  AI is a rapidly evolving space. With the meteoric rise of generative AI applications in the past year, we are now firmly in the era of AI 2.0. This is characterized by large language models that place AI into the hands of millions of consumers and […]

New CXL 3.1 Controller IP for Next-Generation Data Centers

https://www.rambus.com/blogs/new-cxl-3-1-controller-ip-for-next-generation-data-centers/

The AI boom is giving rise to profound changes in the data center; compute-intensive workloads are driving an unprecedented demand for low latency, high-bandwidth connectivity between CPUs, accelerators and storage. The Compute Express Link® (CXL®) interconnect offers new ways for data centers to enhance performance and efficiency. As data centers grapple with increasingly complex AI […]

Data Center Evolution: The Leap to 64 GT/s Signaling with PCI Express 6.1

https://go.rambus.com/the-leap-to-64gts-signaling-with-pcie6#new_tab

The PCI Express® (PCIe®) interface is the critical backbone that moves data at high bandwidth and low latency between various compute nodes such as CPUs, GPUs, FPGAs, and workload-specific accelerators. With the torrid rise in bandwidth demands of advanced workloads such as AI/ML training, PCIe 6.1 jumps signaling to 64 GT/s with some of the […]

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