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HBM Controller Core has been Hardware Validated Northwest Logic’s HBM Controller Core has now been hardware validated using a platform from eSilicon which consists of a Xilinx Virtex-7, SK Hynix Gen1 HBM Device and an organic interposer. This platform performs error-free, high-performance transfers between the controller and the HBM. The HBM Controller Core supports all […]
SAN JOSE, Calif. — September 10, 2015 — eSilicon Corporation, Northwest Logic and SK Hynix today announced they have created a fully working HBM hardware demonstration. This demonstration uses an advanced FPGA containing Northwest Logic’s HBM Controller Core and FPGA-based HBM PHY and SK Hynix HBM devices. eSilicon packaged the FPGA and HBM devices on […]
Loren Shalinsky, a Strategic Development Director at Rambus, recently penned a detailed article for Semiconductor Engineering that explores the memory-storage hierarchy. As he puts it, the hierarchy, or pyramid, is a particularly succinct method of understanding computer systems and the dizzying array of memory options available to the system designer. “Many different parameters characterize the […]
LabStation Validation Platform Contact Us Bring-up and validation of the advanced SoCs is increasingly difficult in today’s fast-paced technology lifecycle. Developed with these challenges in mind, the LabStation platform includes software and hardware to provide a straightforward and accurate method for testing chips and systems. ContactProduct Brief How the LabStation Platform works Design complexity for […]
We make high-performance, low-power memory and serial link interface chips and IP cores to meet the needs of increasingly diverse enterprise and mobile applications.
PCI Express 4.0 Core Northwest Logic is now offering PCI Express Gen 4 support as part of its high-performance PCI Express solution. Northwest logic’s PCI Express solution has been widely deployed in cutting edge ASIC and FPGA designs. Some of the key features of the PCI Express 4.0 Core include: Endpoint, Root-Port, and Switch support […]
Frank Ferro, senior director of product marketing at Rambus, recently told SemiconductorEngineering’s Ed Sperling that he was looking forward to seeing what the company could do for next-gen DDR5 as well as evolving high-bandwidth memory (HBM) interfaces. “The goal is to start to bring the power down through things like better signaling technology for DDR5,” […]
Frank Ferro, senior director of product marketing at Rambus, recently told SemiconductorEngineering’s Ed Sperling that he was looking forward to seeing what the company could do for next-gen DDR5 as well as evolving high-bandwidth memory (HBM) interfaces. “The goal is to start to bring the power down through things like better signaling technology for DDR5,” […]
Rambus makes data centers better by accelerating the movement and delivery of data for more efficient and faster usage of data. We deliver high-speed interfaces and chips to optimizing capacity, connectivity and capability of the cloud.
Semiconductor Engineering editor in chief Ed Sperling recently noted that data center architecture has experienced very few radical changes since the commercial introduction of the IBM System/360 mainframe way back in 1964. “There have been incremental improvements in speed and throughput over the years, with a move to a client/server model in the 1990s, but […]