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Found 207 Results
ChaCha-IP-13
https://www.rambus.com/security/crypto-accelerator-cores/chacha-ip-13/ChaCha-IP-13 ChaCha20 Accelerators Contact Us The ChaCha-IP-13 (EIP-13) is an IP solution for accelerating the ChaCha20 cipher algorithm (RFC7539), supporting the NIST CTR mode up to 12.8 Gbps @ 300MHz. Designed for fast integration, low gate count and full transforms, the ChaCha-IP-13 accelerator provides a reliable and cost-effective embedded IP solution that is easy to […]
ARC4-IP-44
https://www.rambus.com/security/crypto-accelerator-cores/arc4-ip-44/ARC4-IP-44 ARC4 Stream Cipher Accelerators Contact Us The ARC4-IP-44 (EIP-44) is IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec) up to 5 Gbps @ 600MHz. Designed for fast integration, low gate count and full transforms, the ARC4-IP-44 accelerator provides a reliable and cost-effective embedded IP solution that is easy […]
HDCP-IP-114
https://www.rambus.com/security/crypto-accelerator-cores/hdcp-ip-114/Security HDCP-IP-114 HDCP 1.x & HDCP 2.x transform engine The HDCP-IP-114 (EIP-114) is IP for accelerating the high-speed cipher operation specified by HDCP 1.x and 2. Designed for fast integration, low gate count and full transforms, the HDCP-IP-114 transform engine provides a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed […]
HASH-IP-57
https://www.rambus.com/security/crypto-accelerator-cores/hash-ip-57/HASH-IP-57 hash accelerators, MD5, SHA-1, SHA-2, SHA-3 accelerators Contact Us The HASH-IP-57 (EIP-57) is IP for accelerating the various secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SHA-3 (FIPS-202), supporting the NIST MAC mode up to 6.4 Gbps @ 450MHz. Designed for fast integration, low gate count and full transforms, the […]
HMAC-IP-59
https://www.rambus.com/security/crypto-accelerator-cores/hmac-ip-59/HMAC-IP-59 MD5, SHA-1, SHA-2, SHA-3 Hash based HMAC, accelerators Contact Us HMAC-IP-59 (EIP-59) is IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SHA-3 (FIPS-202), up to 8 Gbps. Designed for fast integration, low gate count and full transforms, the HMAC-IP-59 […]
POLY-IP-53
https://www.rambus.com/security/crypto-accelerator-cores/poly-ip-53/POLY-IP-53 Poly1305-based MAC Accelerators Contact Us Poly-IP-53 (EIP-53) is IP for accelerating the Poly1305 hash-based message authentication algorithm (RFC7539), supporting the NIST MAC mode up to 6.4 Gbps @ 450MHz. Designed for fast integration, low gate count and full transforms, the Poly-IP-53 accelerator provides a reliable and cost-effective embedded IP solution that is easy to […]
PKA-IP-28
https://www.rambus.com/security/crypto-accelerator-cores/pka-ip-28/PKA-IP-28 RSA/ECC Public Key Accelerators Contact Us The PKA-IP-28 is a family of Public Key Accelerator IP cores designed for full scalability and an optimal “performance over gate count” deployment. Proven in silicon, the PKA-IP-28 public key accelerator addresses the unique needs of semiconductor OEMs and provides a reliable and cost-effective solution that is easy […]
TRNG-IP-76
https://www.rambus.com/security/crypto-accelerator-cores/trng-ip-76/TRNG-IP-76 FIPS-Certified True Random Number Generators Contact Us The TRNG-IP-76 is a FIPS-compliant IP core for True Random Number Generation (TRNG) with an optional post-processor and several internal self-tests. Designed for easy integration into ASICs and SOCs, the 100% digital standard cell based TRNG-IP-76 provides a reliable and cost-effective embedded IP solution for our customer’s […]
Root of Trust Solutions
https://www.rambus.com/security/root-of-trust/Root of Trust IP Protecting data at rest Contact Us Secure Programmable and Firmware-Controlled Root of Trust IP Providing a hardware-based foundation for security, Rambus offers a portfolio of robust Root of Trust eHSM solutions, ranging from feature-rich programmable security co-processors with Quantum Safe Cryptography and side-channel attack (SCA) protection to highly compact, firmware-controlled designs. […]
Data Security on AI Chips: Hard to protect? (Interview)
https://www.rambus.com/blogs/data-security-ai-chips/Rambus fellow Helena Handschuh recently participated in a Semiconductor Engineering industry panel discussion about securing data running on AI/ML silicon. As the panel participants note, AI systems are designed to process data at high speeds, not limit access. This is precisely why the semiconductor industry is struggling to more effectively secure AI/ML data and prevent […]
