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The MACsec-IP-160 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line rate. It provides classification, transformation and statistics for the IEEE0802.1AE standard MACsec. Additionally, it supports VLAN-in-clear use cases.
In the late 19th century, Dutch cryptographer Auguste Kerckhoff postulated what has become known as “Kerckhoff’s Principle” — a cryptosystem should be secure even if everything about the system, except the key, is public knowledge. Since Kerckhoff’s days, cryptography has certainly evolved. A modern interpretation of Kerckhoff teaches that you shouldn’t rely on the obscurity of your crypto algorithm, […]
Written by Rambus Press Frank Ferro, Senior Director Product Management at Rambus, and Shane Rau, Senior Research Executive at IDC, recently hosted a webinar that explores the role of tailored DRAM solutions in advancing artificial intelligence. Part one of this four-part series reviewed a range of topics including the interconnected system landscape, the impact of […]
Counterfeit chips are large and growing problem putting both civilian and military supply chains at risk. Estimates of the size of the counterfeit market run to $75B and more. With electronics at the heart of so many of the products we depend upon, the risks of counterfeit semiconductors range from inconvenience to loss of property and life.
5G represents a revolution in mobile technology with performance that will rival that of wireline networks. 5G’s Ultra-reliable Low Latency Communication (uRLLC) links will enable a profusion of artificial intelligence (AI)-powered IoT devices from delivery drones to smart cities. The rapid rise in the number of smart IoT devices, coupled with expanded connectivity, will greatly […]
The design of chip anti-tamper protection needs to adapt and scale with rising threats. Adversaries range from high school hackers to well-funded state actors. Given the threats, it’s useful to think about anti-tamper countermeasures as a hierarchy of safeguards that parallel the type, effort and expense of attacks.
Rambus has demonstrated that its HBM2E solution, which consists of a memory controller and a verified 1024-bit PHY, can operate at a whopping 4.0 Gbps data transfer rate per pin. The demonstration is meant to prove potential clients that the HBM2E solution can scale and offer a 25% higher peak bandwidth than is officially defined by JEDEC’s […]
Frank Ferro, Senior Director Product Management at Rambus, and Shane Rau, Senior Research Executive at IDC, recently hosted a webinar that explores the role of tailored DRAM solutions in advancing artificial intelligence. In part one of this four-part series, Ferro and Rau discuss a wide range of topics including the interconnected system landscape, the impact […]
The Rambus 2020 Design Summit kicks off on Thursday, October 08, 2020 at 09:00 AM Pacific Daylight Time. Throughout the day, our technology experts will discuss the selection and implementation of IP solutions across multiple markets such as the data center, 5G/edge and IoT devices, and AI/ML applications. Critical enabling IP that will be covered […]
Highlights: Fully-integrated HBM2E memory interface solution, consisting of verified PHY and controller, achieves industry’s fastest performance New benchmark in performance supports accelerators requiring terabyte-scale bandwidth for artificial intelligence/machine learning (AI/ML) training applications Partners with SK hynix and Alchip to develop 2.5D HBM2E memory system solution using TSMC N7 process and CoWoS® advanced packaging technologies Offers unrivaled […]
