At Rambus, we create cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting.
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Implementing Strong Security for AI/ML Accelerators [Part One]
https://go.rambus.com/implementing-strong-security-for-ai-ml-accelerators-part-one#new_tabDedicated accelerator hardware for artificial intelligence and machine learning algorithms are increasingly prevalent in data centers and endpoint devices. These accelerators handle important data which has value and must be protected. Many security threats exist that can compromise these assets. Fortunately, there are security techniques which can mitigate these threats.
Implementing Strong Security for AI/ML Accelerators [Part Two]
https://go.rambus.com/implementing-strong-security-for-ai-ml-accelerators-part-two#new_tabDedicated accelerator hardware for artificial intelligence and machine learning algorithms are increasingly prevalent in data centers and endpoint devices. These accelerators handle important data which has value and must be protected. Many security threats exist that can compromise these assets. Fortunately, there are security techniques which can mitigate these threats.
Implementing Strong Security for AI/ML Accelerators [Part Three]
https://go.rambus.com/implementing-strong-security-for-ai-ml-accelerators-part-three#new_tabDedicated accelerator hardware for artificial intelligence and machine learning algorithms are increasingly prevalent in data centers and endpoint devices. These accelerators handle important data which has value and must be protected. Many security threats exist that can compromise these assets. Fortunately, there are security techniques which can mitigate these threats.
Challenges and Benefits of Certification of Security Hardware
https://go.rambus.com/challenges-and-benefits-of-certification-for-security-hardware#new_tabAs chip designers face greater requirements for security, they also have a growing number of options for secure silicon IP. They can build it themselves, use “free” IP that comes along with other components, use something open source, or obtain it from an IP vendor that specializes in security. There are pros and cons to […]
HBM2E Controller Product Brief
https://go.rambus.com/hbm2-controller-product-brief#new_tabHBM is a high-performance memory that features reduced power consumption and a small form factor. It combines 2.5D packaging with a wider interface at a lower clock speed (as compared to DDR4) to deliver higher overall throughput at a higher bandwidth-per-watt efficiency for high-performance computing applications. The Northwest Logic HBM2 Controller supports both HBM2 and […]
GDDR6 Controller Product Brief
https://go.rambus.com/gddr6-controller-product-brief#new_tabOriginally designed for graphics applications, GDDR6 is a high-performance memory solution that can be used in a variety of compute-intensive applications including artificial intelligence (AI), data center and advanced driver assistance systems (ADAS). The Northwest Logic GDDR6 Controller supports data rates of up to 20 Gbps per data pin. With the Rambus GDDR6 PHY, it comprises […]
DDR4 Controller Product Brief
https://go.rambus.com/ddr4-controller-product-brief#new_tabThe Northwest Logic DDR4 controller core is designed for high memory throughput, high clock rates, and full programmability in computing and networking applications. With the Rambus DDR4 PHY it comprises a complete DDR4 memory interface subsystem.
DDR3 Controller Product Brief
https://go.rambus.com/ddr3-controller-product-brief#new_tabThe Northwest Logic DDR3 controller core is designed for high memory throughput, high clock rates, and full programmability in computing and networking applications. With the Rambus DDR3 PHY it comprises a complete DDR3 memory interface subsystem.
Read-Modify-Write Core Product Brief
https://go.rambus.com/read-modify-write-core-product-brief#new_tabPart of a full suite of memory controller add-on cores, the Read-Modify-Write Core handles misaligned bursts when an Error Correction Code (ECC) is being used. Read-Modify-Write write operations are by their very nature inefficient. The Read-Modify-Write core implements a prefetch architecture that maximizes the memory bus utilization as efficiently as possible.
Memory Test Analyzer Core Product Brief
https://go.rambus.com/memory-test-analyzer-core-product-brief#new_tabPart of a full suite of memory controller add-on cores, the Memory Test Analyzer Core can be used in conjunction with the Memory Test Core to capture actual and expected test data. The core is useful for chip and board validation. It provides low-cost, built-in logic analyzer capability similar in concept to FPGA-based internal logic […]
