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Security

DPA Resistant Software Libraries

DPA Resistant Software Libraries are a portfolio of unique products that provide performance optimized, quantifiable side-channel resistant security for embedded software systems with seamless integration across a wide range of applications. Our software libraries come in two main varieties, platform neutral C-code which is designed to run on any platform and optimized code for ARM Cortex platforms, providing a wide range of device design options.

How DPA Resistant Software Libraries work

The DPA Resistant Software Libraries offer OEMs an easy-to-integrate software package that is resistant to first and second order DPA attacks, allowing them to have strong security without the need of specific security hardware.

Our high performance software libraries offer application builders an easy-to-integrate software security solution with built-in quantifiable side-channel resistance. The libraries are validated by Rambus for performance across a range of compilers and processors to protect against key extraction of up to 1 million traces, compared to 1 to 10K traces for non-protected implementations like Gladman reference code or other commercial and open source crypto libraries.

DPA Resistant Software Library
Introduction to Side-Channel Attacks eBook

Introduction to Side-Channel Attacks

Side-channel attacks conducted against electronic gear are relatively simple and inexpensive to execute. Such attacks include simple power analysis (SPA) and Differential Power Analysis (DPA). As all physical electronic systems routinely leak information, effective side-channel countermeasures should be implemented at the design stage to ensure protection of sensitive keys and data.

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The implemented data structures and APIs allow easy integration in industry standard software security protocol implementations by swapping their unprotected cryptographic primitives with protected versions available in the selected DPA-Resistant Software Library.
AES-128 Implementation Graphic

Solution Offerings

  • High-security primitives for AES, 3DES, ECC, RSA, and SHA
  • Tested on multiple platforms including ARM Cortex-A9, ARM7TDMI, and x86
  • Extended API set and optimized data structures for each supported algorithm
  • AES supports 128/192/256-bit encrypt and decrypt
  • 3DES supports 112/168 bit encrypt and decrypt
  • RSA supports signing and decryption at 1024/2048/ 4096/8192 bit lengths
  • ECC supports ECDSA, ECDH for NIST prime fields (192/256/384/521)
  • SHA-256 & HMAC-SHA-256
  • Includes PRNG and big number modular
  • Montgomery math functions
  • Incorporates state-of-the-art DPA countermeasures such as shuffling, blinding, and masking
  • DPA Resistant Software Library (individual or complete set)
  • Source code (C99 with platform-specific assembly depending on version)
  • Package library and build scripts for the reference platform
  • Library usage guide and reference manual
  • Support: quarterly enhancements
  • Optional Services: analysis, development, integration, and optimization
Protecting Electronic Systems eBook thumbnail

Protecting Electronic Systems from Side-Channel Attacks

Side-channel attacks comprise a wide range of techniques including Differential Power Analysis, Simple Power Analysis, Simple Electromagnetic Analysis, Differential Electromagnetic Analysis, Correlation Power Analysis and Correlation Electromagnetic Analysis. An effective layer of side-channel countermeasures should therefore be implemented via hardware (DPA resistant cores), software (DPA resistant libraries) or both. After layered countermeasures have been implemented, systems should be carefully evaluated to confirm the cessation of sensitive side-channel leakage.

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Inventions

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DPA Countermeasures

DPA Countermeasures are fundamental techniques for protecting against Differential Power Analysis (DPA) and related side-channel attacks. Consisting of a broad range of software, hardware, and protocol techniques, DPA Countermeasures include reducing leakage, introducing amplitude and temporal noise, balancing hardware and software, incorporating randomness, and implementing protocol level countermeasures.