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Security

DPA Resistant Core

Rambus DPA Resistant Hardware Cores, when integrated into an SoC, prevent against the leakage of secret cryptographic key material through attacks. These superior performance cores are easy to integrate into SoCs and FPGAs, providing robust side-channel resistance across different security and performance levels.

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Product Brief

How it works

The DPA Resistant Hardware cores offer chipmakers an easy-to-integrate technology independent soft-macro security solution with built-in side-channel resistance for cryptographic functions across a wide array of devices.

Our high-performance cores provides a higher level of protection than standard security cores while improving time to market as all the cores are validated DPA countermeasures. It is highly flexible for integration with standard cipher modes such as Cipher Block Chaining (CBC), and Electronic Code Book (ECB).

DPA Resistance diagram

Additionally, our DPA Countermeasure hardware cores offer both encryption and decryption functions with key size options of 128- and 256-bits for AES and up to 4096 bits for RSA.

Our secure cores implement DPA countermeasures such as LMDPL (LUT-Masked Dual-rail with Pre-charge Logic) gate level masking and other schemes, delivering the highest level of security while maintaining area, performance and power budget targets. These countermeasures are portable to any FPGA and ASIC technologies.

Introduction to Side-Channel Attacks

Side-channel attacks conducted against electronic gear are relatively simple and inexpensive to execute. Such attacks include simple power analysis (SPA) and Differential Power Analysis (DPA). An attacker does not need to know specific implementation details of the cryptographic device to perform these attacks and extract keys. As all physical electronic systems routinely leak information, effective side-channel countermeasures should be implemented at the design stage to ensure protection of sensitive keys and data.

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Solution Offerings

Protecting Electronic Systems from Side-Channel Attacks

As all physical electronic systems routinely leak information, effective side-channel countermeasures such as Rambus’ DPA Resistant Hardware Cores (DPARC) or DPA Software Library (DPASL) should be implemented at the design stage to ensure protection of sensitive keys and data. After the implementation of hardware or software countermeasures, systems should be carefully evaluated with a Test Vector Leakage Assessment (TVLA) platform such as the Rambus DPA Workstation (DPAWS) to confirm the cessation of sensitive side-channel leakage.

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Inventions

DPA Countermeasures

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DPA Countermeasures are fundamental techniques for protecting against Differential Power Analysis (DPA) and related side-channel attacks. Consisting of a broad range of software, hardware, and protocol techniques, DPA Countermeasures include reducing leakage, introducing amplitude and temporal noise, balancing hardware and software, incorporating randomness, and implementing protocol level countermeasures.

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Aerospace & Defense
IoT
Mobile Edge