A Potential Measure against Side Channel Attacks with DPASL
This entry was posted on Monday, November 19th, 2018.
With the proliferation of connected devices and the sensitive data they produce comes a significant challenge for manufacturers seeking to comprehensively protect their devices from exploits and attacks. As devices and services get more sophisticated as well as the attacks aimed at those devices and services, high levels of security must now be implemented as a primary design parameter, rather than a tertiary afterthought.
Differential Power Analysis (DPA) is a form of a side-channel attack that monitors variations in the electrical power consumption or electro-magnetic emissions of a target device. The basic method involves partitioning a set of traces into subsets, then subsequently computing the difference of the averages of these subsets. A trace refers to a set of power consumption measurements taken while the device is performing cryptographic operations. Given enough traces, extremely minute correlations can be isolated no matter how much noise is present in the measurements.
Differential Power Analysis-Resistant Software Libraries (DPASL) are a portfolio of unique software products that provide performance optimized, quantifiable side-channel resistant security for embedded software systems with seamless integration across a wide range of applications. DPASLs’ performance optimized side-channel attack resistant solutions include AES, 3DES, SHA-2, HMAC, ECDSA, ECDH, RSA, and RSA-CRT.
What makes DPASL unique is that with the platform, DPA protections can be enabled at the device level, without relying on DPA countermeasures being implemented at the silicon level. DPASLs are validated to resist first-order and second-order DPA attacks in over one million traces. They are highly flexible and easy to deploy software attacks, utilizing both platform neutral C-code and optionally ARM Cortex optimized code, thereby providing a wide range of device design options. The platform has a strong balance of side-channel protection and performance and code-size.
High-performance software libraries offer application builders an easy-to-integrate software security solution with built-in quantifiable side-channel resistance. The libraries are validated by Rambus for performance across a range of compilers and processors to protect against key extraction of up to 1 million traces, compared to 1 to 10K traces for non-protected implementations like Gladman reference code or other commercial and open source crypto libraries.
The implemented data structures and APIs allow easy integration in industry standard software security protocol implementations by swapping their unprotected cryptographic primitives with protected versions available in the selected DPA-Resistant Software Library.
While it can be argued that silicon-level protections are more robust than those implemented in software at a device-level, DPASL does offer a convenient alternative if designing side-channel resistant hardware is not a realistic option, when standard silicon with non-DPA protection ciphers are used.
The Bottom Line
As devices and services become more advanced and sophisticated, so too do the exploitations and attacks that target them. It is more important than ever for high level security to be implemented as a primary design focus. Should designing side-channel resistance on the hardware level was not a realistic option, DPASLs are a feasible alternative that offers side-channel resistant security on the software level with seamless integration across a wide range of applications with wide range of device options. The platform offers security against side-channel attacks, providing even more options for those who wish to secure their devices.