EE Times highlights Rambus’ cryogenic computing research

This entry was posted on Wednesday, April 19th, 2017.

Junko Yoshida of the EE Times reports that Rambus, in collaboration with Microsoft, will have an early prototype of cryogenic memory in a month – and a more complete prototype by the end of the year. The new technology is expected to be “essential” to data centers, which are currently the fastest growing consumer of memory.


According to Rambus chief scientist Craig Hampel, the new memory subsystems will be designed to operate below minus−180 °C or minus−292.00 °F or 93.15 kelvin. This capability is expected to substantially reduce energy consumption and improve the overall performance of a bank of computers deployed in the cloud for massive data processing. By breaking down the cryogenic systems’ long-term goal for quantum computing in bite size, Rambus has applied the new technologies to prototyping DRAM that can operate below 90 kelvin.

As Yoshida notes, the U.S. National Institute of Standards and Technology defines cryogenic temperatures at below minus−180 °C or minus−292.00 °F or 93.15 kelvin (K). Conventional DRAM operates at room temperature – roughly at 350 and 350 K.

“By cooling down to 90 K, you bring down the leakage to zero, while achieving higher performance at a much lower temperature,” Hampel told the publication. “Once you bring the temperature down to 7 K, that’s when you get into the superconducting domain. It allows all of the interconnect power to become zero.”

For quantum computing, says Hampel, cryogenic memory must “operate at 20 to 40 millikelvin, which is essentially colder than deep space.”

Thus far, by succeeding in a DRAM prototype that works at colder than 90 K, Rambus is “hopeful,” said Hampel, that this leads to “better DRAM scaling, lowering cost and increasing reliability” in subsystems currently under tremendous thermal stress.

As Hampel confirms, the goal for Rambus is to develop a cryogenic memory subsystem in the next two to three years.

“We have always pushed new memory architecture. We approached Microsoft for partnership, [as both companies identified data centers] as the best home for new memory innovation,” he added.

Commenting on technical barriers to building a cryogenic memory system, Hampel noted that both DRAM and the CMOS logic process are not yet defined at cryogenic temperatures.

“Defining the DRAM and logic process and designing to optimize power at these temperatures for both the DRAM device and the memory controller are critical steps,” he explained. “[Plus], the interfaces must be extremely high performance electrical links. They must minimize thermal conduction between domains, while maximizing the bandwidth. This requires new materials and new serial link technologies (SerDes).”

In addition, says Hampel, a significant challenge is posed by manufacturing and testing methodologies for a system that can be used at conventional temperatures but optimally operated in a cryogenic deep-freeze.

During his interview with the EE Times, Hampel also referenced recent cryogenic research at the Intelligence Advanced Research Projects Activity (IARPA), an organization within the office of the Director of National Intelligence. According to the chief scientist, the IARPA research tends to focus on new memory device types, such as MRAM and nano-tubes.

“[In contrast], we think DRAM can be quite competitive with much lower cost and much easier to develop,” Hampel stated. “We are utilizing some of the same materials, but for DRAM. [In the] long-term, this may have merit and we are doing similar work, but believe that something that utilizes DRAM as the storage cell will have much better cost and capacity than anything new for years.”

For the past 50 years, says Hampel, Dennard Scaling of process voltages in DRAM, along with Moore’s Law, have been a preferred and lower effort path. However, with the breakdown of Dennard Scaling between 2005–2007 and the waning of Moore’s Law, the industry needs to consider transitioning to a technology such as cryogenics to continue scaling. To be sure, the development of cryogenic technology could potentially extend the DRAM roadmap by five to 10 years.

Interested in learning more? The full text of “Rambus, Microsoft heat up with cold DRAM” by Junko Yoshida is available on the EE Times here. You can also check out or cryogenic memory page on here.