Rambus has confirmed the development of its R+ DDR4 PHY on the GLOBALFOUNDRIES 14nm LPP process.
“As part of a comprehensive suite of memory and SerDes interface offerings for networking and data center applications, we have achieved the first production-ready 3200 Mbps DDR4 PHY available on the power-performance optimized 14nm Low Power Plus (LPP) process,” said Luc Seraphin, senior VP and GM of the Rambus Memory and Interfaces Division.
“The R+ DDR4 PHY is designed to meet the performance and capacity demands of the next wave of data center and networking markets.”
According to Seraphin, as the industry becomes more reliant on the Cloud and new demands are placed on data centers, the need for memory technology that promises faster speeds and higher bandwidth has never been more important.
“Together with GLOBALFOUNDRIES, we have been able to develop the industry’s first DDR4 PHY on a 14nm LPP process running at 3200 Mbps and capable of achieving the performance requirements of next-generation systems,” he added.
As Seraphin notes, the R+ DDR4 PHY is DFI 4.0 compatible, which facilitates easy integration and enables customers to differentiate their offerings by providing industry-leading performance – all while maintaining full compatibility with industry standard DDR4 and DDR3/3L/3U interfaces.
“Designed for flexibility, the R+ DDR4 PHY delivers data rates from 800 to 3200 Mbps in multiple memory sub-system options including die down, DIMM and 3DS,” he concluded. “In addition, the PHY supports 16 – 72-bit interfaces, along with single and multi-rank configurations – helping to optimize designs for both area and power.”
It should be noted that Rambus’ R+ industry-standard interface solutions are high-quality, complete PHY solutions designed with a system-oriented approach – maximizing flexibility in today’s most challenging system environments.
More specifically, Rambus PHYs contain all of the necessary components for robust operation and ease of integration. They consist of hard macros of the command/address (C/A) and 8-bit data cells, and include IO pads, phase lock loops (PLL), power mode management (PMM), transmit and receive paths, clock distribution, control logic, power distribution and electrostatic discharge (ESD) protection circuitry.
Outside of the PHY itself, Rambus solutions also include complete documentation and access to in-house experts for optional design integration and bring-up support services to make integration as straightforward as possible.
For more information about R+ DDR4 and our other memory PHYs, visit rambus.com/ddrnphys.