ARM TechCon 2014 kicks off today in Santa Clara, California.
We’ll be at booth #206, showcasing our flagship DPA resistant cryptographic cores and software libraries. The demo shows a comparison of potential vulnerabilities of standard AES implementations in hardware and software versus DPA resistant AES core and library. The standard AES core is susceptible to DPA attacks and leaks a sufficient amount to lose valuable data, while the DPA resistant core shows no significant leakage and remains protected from side-channel attacks.
These DPA resistant cores are compatible with software-based security, such as ARM TrustZone, and provide an additional layer of protection at the hardware level for those applications that require resistance to invasive and non-invasive attacks on the device.
“All forms of electronic devices with secret keys are susceptible to side channel attacks which are low-cost, non-invasive methods for adversaries to extract the secret key of a cryptosystem,” said Ben Jun, VP and CTO at Cryptography Research, a Division of Rambus.
“That is why we developed DPA countermeasures to protect tamper-resistant devices against all forms of side channel attacks. These ready-to-use DPA resistant IP cores offer chipmakers an easy-to-integrate security solution with built-in side channel resistance for cryptographic functions across a wide range of devices and platforms.”
Booth #206 will also be hosting an interactive CryptoFirewall™ Security Core demo running on an ST set-top box development board – with a CryptoFirewall core providing the (content) decryption key. Specific demo features include differentiation, provisioning of rights using ERKs, channel change and decryption of two streams simultaneously with both displayed via picture-in-picture.
Additional demos include:
Beyond DDR4 technology for next-gen server memory: With data rates of up to 6.4 Gbps in a multi-rank, multi-DIMM system, R+ technology simplifies system design and significantly reduces overall system power requirements.
R+LPDDR3: Optimized for mobile applications, R+LPDDR3 is fully compliant with LPDDR3 and LPDDR3e specifications. When paired with theR+ LPDDR3 PHY, the DRAM is capable of supporting data rates of up to 2400 Mbps, while providing an active power reduction of up to 30% when compared to a standards-only LPDDR3 device at equivalent speed.
Can’t make to ARM TechCon 2014? You can follow the show on Twitter via the #ARMTechCon hashtag. Rambus will also be tweeting updates from booth 206 and the conference floor, so be sure to check out #rambus throughout ARM TechCon 2014.