Home > Search
Found 219 Results
Suresh Andani, senior director of product marketing at Rambus, has written an article for Semiconductor Engineering that takes a closer look at why data center scaling requires new interface architectures. As Andani notes, global data traffic is growing at an exponential rate. More specifically, 5G networks are enabling billions of AI-powered IoT devices untethered from […]
Suresh Andani, senior director of product marketing at Rambus, has written an article for Semiconductor Engineering that takes an in-depth look at how 112G XSR SerDes can be used to optimally design chiplet and co-packaged optics architectures. As Andani notes, conventional chip designs are struggling to achieve the scalability, as well as power, performance, and […]
Artificial Intelligence/Machine Learning (AI/ML) grows at a blistering pace. The size of the largest training models has passed 100 billion parameters and is on pace to hit a trillion in the next year. The impact of AI/ML is being felt across the industry landscape, in higher education, and in financial markets. Underpinning this growth is […]
Highlights: Supports accelerators requiring terabyte-scale bandwidth for artificial intelligence/machine learning (AI/ML) training applications Fully-integrated HBM2E memory interface subsystem, consisting of verified PHY and controller, silicon proven on advanced Samsung 14/11nm FinFET process Backed by unrivaled system expertise supporting customers with interposer and package reference designs to speed time to market SAN JOSE, Calif. – April 21, 2021 – Rambus […]
1G to 50G Single-Port MACsec Engine with TSN support Contact Us The MACsec-IP-161 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line rate. It provides classification, transformation and statistics for the IEEE802.1AE standard MACsec. Additionally, it supports VLAN-in-clear use cases, IEEE802.3br preemption and Cisco […]
Frank Ferro, Senior Director Product Management at Rambus, has written a detailed article for Semiconductor Engineering that explains why HBM2E is a perfect fit for Artificial Intelligence/Machine Learning (AI/ML) training. As Ferro points out, AI/ML growth and development are proceeding at a lighting pace. Indeed, AI training capabilities have jumped by a factor of 300,000 […]
The PCI Express® (PCIe) interface is the critical backbone that moves data at high bandwidth between various compute nodes such as CPUs, GPUs, FPGAs, and workload-specific accelerators. The rise of cloud-based computing and hyperscale data centers, along with high-bandwidth applications like artificial intelligence (AI) and machine learning (ML), require the new level of performance of […]
Rambus’ Suresh Andani has written a detailed Semiconductor Engineering article that explores how PCIe 5 can effectively accelerate AI and ML applications. According to Andani, the rapid adoption of sophisticated artificial intelligence/machine learning (AI/ML) applications and the shift to cloud-based workloads has significantly increased network traffic in recent years. However, the paradigm of virtualization can […]
As a momentous 2020 fades into the history books, 2021 is expected to be a year of growth and evolution for the semiconductor industry across multiple market segments. Firstly, DDR5 DRAM is slated to enter volume production by the end of 2021, with initial deployments targeting hyperscale data centers. Secondly, AI/ML neural networks – which […]
Root of Trust for FPGAs Contact Us FPGAs (Field Programmable Gate Arrays) are widely used in industries such as Defense, Telecommunications, Automotive and AI/ML (Artificial Intelligence/Machine Learning) because of their reconfigurability and flexibility. Whether functioning as the essential building blocks of avionics and spacecraft systems, controlling ADAS (Advanced Driver Assisted Systems) systems, or assisting inference […]