At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer.
Found 140 Results
Saving power with HBM
https://www.rambus.com/blogs/saving-power-with-hbm-2/Ed Sperling of Semiconductor Engineering notes that power has always been a “global concern” in the design process because it affects every part of a chip. Nevertheless, partitioning for power rather than functionality or performance has not, historically, been seriously considered, although the status quo is beginning to change. For example, says Sperling, the increasing use […]
Start Your HBM/2.5D Design Today
https://www.rambus.com/start-your-hbm-2-5d-design-today/SK hynix, Inc., Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems have joined forces to offer a complete High Bandwidth Memory (HBM) supply chain solution. HBM is a JEDEC-defined standard that utilizes 2.5D technology to interconnect a SoC and a HBM memory stack. To learn more about the Rambus HBM2E Controller, click here.
Controllers Newsletter – Q3 2015
https://www.rambus.com/controllers-newsletter-q3-2015/HBM Controller Core has been Hardware Validated Northwest Logic’s HBM Controller Core has now been hardware validated using a platform from eSilicon which consists of a Xilinx Virtex-7, SK Hynix Gen1 HBM Device and an organic interposer. This platform performs error-free, high-performance transfers between the controller and the HBM. The HBM Controller Core supports all […]
LabStation Validation Platform
https://www.rambus.com/interface-ip/labstation-validation-platform/LabStation Validation Platform Contact Us Bring-up and validation of the advanced SoCs is increasingly difficult in today’s fast-paced technology lifecycle. Developed with these challenges in mind, the LabStation platform includes software and hardware to provide a straightforward and accurate method for testing chips and systems. ContactProduct Brief How the LabStation Platform works Design complexity for […]
Memory Interface Chips
https://www.rambus.com/memory-interface-chips/We make high-performance, low-power memory and serial link interface chips and IP cores to meet the needs of increasingly diverse enterprise and mobile applications.
The DDR5-HBM connection
https://www.rambus.com/blogs/the-ddr5-hbm-connection-2/Frank Ferro, senior director of product marketing at Rambus, recently told SemiconductorEngineering’s Ed Sperling that he was looking forward to seeing what the company could do for next-gen DDR5 as well as evolving high-bandwidth memory (HBM) interfaces. “The goal is to start to bring the power down through things like better signaling technology for DDR5,” […]
From GDDR to HBM
https://www.rambusblog.com/2015/02/18/from-gddr-to-hbm/#new_tabA recent KitGuru report suggests AMD has designed its upcoming Radeon R9 380X with high bandwidth memory, or HBM, a next-gen stacked DRAM memory standard. “Although HBM provides DDR3 – like bit rate per pin (HBM1=1GHz, HBM2=2GHz), the standard more than compensates with its channel of 128 bits each,” Loren Shalinsky, a Strategic Development Director […]
From GDDR to HBM
https://www.rambus.com/blogs/from-gddr-to-hbm-2/A recent KitGuru report suggests AMD has designed its upcoming Radeon R9 380X with high bandwidth memory, or HBM, a next-gen stacked DRAM memory standard. Read first our primer on: HBM2E Implementation & Selection – The Ultimate Guide » “Although HBM provides DDR3 – like bit rate per pin (HBM1=1GHz, HBM2=2GHz), the standard more than […]
On-Chip Noise Monitor
https://www.rambus.com/interface-ip/on-chip-noise-monitor/On-chip Noise Monitor Contact Us Our On-chip Power Supply Noise Monitor is a compact IP block designed to give SoC designers a better understanding of the effects of power supply noise on circuit performance, and ultimately, improve the chip quality and reduce time-to-market. It is embedded directly into the SoC and accurately measuring power supply […]
Controllers Newsletter – Q1 2014
https://www.rambus.com/controllers-newsletter-q1-2014/Expresso DMA Bridge Core Now Available! The Expresso DMA Bridge Core is the latest addition to Northwest Logic’s comprehensive PCI Express Solution. It supports high-performance DMA and bridging between PCI Express and AXI for both Endpoint and Root Port applications. Key features include: High-Throughput PCIe-AXI Bridge Address Translation and Security support Optimized Root Port Bridging […]
