At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer.
Found 140 Results
An Introduction to HPC computing
https://www.rambus.com/blogs/an-introduction-to-hpc-computing/Written by Steven Woo Dominated by the United States, Japan and China, the high-performance computing (HPC) space is driven by an insatiable demand for ever-higher performance and greater power efficiency. With each new supercomputer debut, the above-mentioned trio sets progressively higher bars with the goal of capturing the highest Top500 score. Summit, Sierra and Sunway […]
Rambus to Acquire Northwest Logic, Extending Leadership in Interface IP
https://www.rambus.com/rambus_to_acquire_northwest_logic_extending_leadership_in_interface_ip/Highlights: Complementary product portfolio of PHYs and controllers further accelerates Rambus growth Expands solutions for data center, artificial intelligence (AI), machine learning (ML), communications and automotive applications Combined offerings, including HBM2, GDDR6, DDR4 and PCI Express (PCIe), create one-stop-shop for SoC designers SUNNYVALE, Calif. and HILLSBORO, Ore. – July 29, 2019 – Rambus Inc. (NASDAQ: […]
Rambus to Acquire Northwest Logic, Extending Leadership in Interface IP
https://www.rambus.com/rambus-to-acquire-northwest-logic/Highlights: Complementary product portfolio of PHYs and controllers further accelerates Rambus growth Expands solutions for data center, artificial intelligence (AI), machine learning (ML), communications and automotive applications Combined offerings, including HBM2, GDDR6, DDR4 and PCI Express (PCIe), create one-stop-shop for SoC designers SUNNYVALE, Calif. and HILLSBORO, Ore. – July 29, 2019 – Rambus Inc. (NASDAQ: […]
The Autobahn Lanes of HBM2 and GDDR6
https://www.rambus.com/blogs/the-autobahn-lanes-of-hbm2-and-gddr6/Narrow roads versus silicon superhighways Steven Woo, Rambus fellow and distinguished inventor, recently spoke with Ed Sperling of Semiconductor Engineering about the capabilities of HBM2 and GDDR6 memory in real-world scenarios. As Woo notes, choosing between HBM2 and GDDR6 is a complex design decision that requires an in-depth understanding of system and application requirements. For […]
Controllers Newsletter – Q2 2019
https://www.rambus.com/controllers-newsletter-q2-2019/Northwest Logic is the HBM2 Controller Market Leader Since the first demonstration in 2015, Northwest Logic’s HBM2 controllers have become market’s preferred choice: 31 customer designs and 9 test chips Silicon proven on TSMC, Samsung, Global Foundries processes Full support for HBM2, HBM2E and Low Latency HBM devices Broadcom, Rambus, eSilicon and Synopsys HBM PHY […]
What About AI Regulations?
https://www.rambus.com/blogs/what-about-ai-regulations/These days, there’s considerable talk and hoopla surrounding artificial intelligence/AI. Tech companies on a worldwide basis are talking about how their products are complying with AI requirements. And that includes Rambus with its lineup of new GDDR6 and HBM2 PHYs. These products provide SoC and system designers the right solutions to move onward with next […]
eSilicon Tapes Out 7nm Combo PHY (HBM2/HBM2E/Low Latency) Test Chip
https://www.rambus.com/esilicon_combo_phy_hbm2_hbm2e_low_latency/Chip facilitates continued support of the latest HBM technologies for eSilicon’s 2.5D FinFET ASICs SAN JOSE, Calif. — May 9, 2019 — eSilicon, a leading provider of FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, announced today the tapeout of a 7nm test chip to provide silicon validation of its physical interface (PHY) […]
Training Neural Networks
https://www.rambus.com/blogs/training-neural-networks/by Steven Woo Neural networks (NNs) span a wide range of topologies and sizes. Some neural networks are relatively simple and have only two or three layers of neurons, while so-called deep neural networks may comprise 100+ layers of neurons. In addition, the layers can be extremely wide – with hundreds to thousands of neurons […]
Understanding ML and ANN memory requirements
https://www.rambus.com/blogs/understanding-ml-and-ann-memory-requirements/Written by Steven Woo Artificial Neural Networks First proposed in 1944 by Warren McCullough and Walter Pitts, an artificial neural network (ANN) or more commonly, a neural network (NN), can perhaps best be defined as a computational model that attempts to closely emulate the network of neurons present in the human brain. More specifically, neuromorphic […]
Uber eyes an AI future
https://www.rambus.com/blogs/uber-eyes-an-ai-future/Rick Merritt of the EE Times recently reported that Uber is using banks of Nvidia GPUs for deep learning applications. The transportation network company (TNC) is also testing FPGAs from multiple startups such as Eyeris, Graphcore and Wave Computing. In addition, Uber maintains a dedicated AI research team that oversees more than a dozen deep-learning models […]
