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Rambus launches High Bandwidth Memory PHY on GLOBALFOUNDRIES 14nm LPP

https://www.rambus.com/blogs/rambus-launches-high-bandwidth-memory-phy-on-globalfoundries-14nm-lpp/

Rambus has announced the availability of its High Bandwidth Memory (HBM) Gen2 PHY developed for the GLOBALFOUNDRIES FX-14TM ASIC Platform. Designed for systems that require low latency and high bandwidth memory, the Rambus HBM PHY, built on the GLOBALFOUNDRIES advanced 14nm Power Plus (LPP) process technology, is targeted at networking and data center applications. According to […]

Rambus Introduces High Bandwidth Memory PHY on GLOBALFOUNDRIES FX-14™ ASIC Platform using 14nm LPP Process Technology

https://www.rambus.com/rambus-introduces-high-bandwidth-memory-phy-on-globalfoundries-fx-14-asic-platform-using-14nm-lpp-process-technology/

High-performance, power-efficient memory solution designed for today’s data centers SUNNYVALE, Calif. – February 7, 2017 – Rambus Inc. (NASDAQ: RMBS) today announced the availability of its High Bandwidth Memory (HBM) Gen2 PHY developed for GLOBALFOUNDRIES high-performance FX-14TM ASIC Platform. Built on the GLOBALFOUNDRIES 14nm FinFET (14LPP) process technology, the Rambus HBM PHY is aimed at […]

Rambus is at DesignCon 2017

https://www.rambus.com/blogs/rambus-is-at-designcon-2017/

The DesignCon 2017 expo kicks off on February 2nd in Santa Clara. We’re at booth #833, showcasing our comprehensive suite of Ethernet, PCIe and DDRn IP solutions to solve today’s most challenging data center and networking needs. Rambus technical experts, executives and partners will also be holding a series of talks and technical training sessions […]

Controllers Newsletter – Q4 2016

https://www.rambus.com/controllers-newsletter-q4-2016/

HBM2 Update From Northwest Logic and eSilicon eSilicon and Northwest Logic have been collaborating on 2.5D HBM designs for several years, starting with an FPGA, HBM1, organic interposer-based design more than five years ago. Since then, eSilicon has created a high-performance HBM PHY and taped out several multi-project wafer runs for silicon IP validation, improved […]

Saving power with HBM

http://www.rambusblog.com/2016/11/28/saving-power-with-hbm/#new_tab

Ed Sperling of Semiconductor Engineering notes that power has always been a “global concern” in the design process because it affects every part of a chip. Nevertheless, partitioning for power rather than functionality or performance has not, historically, been seriously considered, although the status quo is beginning to change.

Saving power with HBM

https://www.rambus.com/blogs/saving-power-with-hbm-2/

Ed Sperling of Semiconductor Engineering notes that power has always been a “global concern” in the design process because it affects every part of a chip. Nevertheless, partitioning for power rather than functionality or performance has not, historically, been seriously considered, although the status quo is beginning to change. For example, says Sperling, the increasing use […]

Controllers Newsletter – Q3 2016

https://www.rambus.com/controllers-newsletter-q3-2016/

Northwest Logic’s Market Leading HBM Controller Northwest Logic’s HBM Controller is the most widely used HBM controller IP in the market. Key features include – Fully HBM Gen2 compliant – Highly configurable enabling performance, size and power to be optimized – High efficiency, short transaction AXI support – Optional transaction reordering to optimize performance – […]

Controllers Newsletter – Q2 2016

https://www.rambus.com/controllers-newsletter-q2-2016/

Northwest Logic’s Memory Controllers are available for use in GLOBAL FOUNDRIES advanced process nodes Northwest Logic and GLOBAL FOUNDRIES (GF) are collaborating to provide complete Memory Controller and PHY solutions for GLOBAL FOUNDRIES advanced process nodes. These solutions combine Northwest Logic’s high-performance, silicon-proven HBM, DDR4/3/2/1, LPDDR4/3/2/1 Controller Cores with GF ASIC PHYs. This collaboration provides […]

Optimizing memory bandwidth

https://www.rambus.com/blogs/optimizing-memory-bandwidth-2/

Frank Ferro, a senior director of product management at Rambus, recently sat down with Ed Sperling of Semiconductor Engineering and other industry participants to discuss the slew of new memory initiatives and entrants. According to Ferro, the initiatives were prompted by the need for improved efficiency from a latency standpoint in the memory hierarchy. “You […]

Exploring 2.5D packaging and beyond

https://www.rambus.com/blogs/exploring-2-5d-packaging-and-beyond-2/

Frank Ferro, a Senior Director of Product Marketing at Rambus, recently participated in a Semiconductor Engineering roundtable discussion about 2.5D and advanced packaging. According to Ferro, 2.5D can succeed if customer demand overcomes the additional engineering costs associated with the packaging process. “Back in the mobile days when we started seeing 3D packaging, it was […]

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