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On October 8th, technology experts from across Rambus came together for a virtual summit to present on the selection and implementation of IP solutions for the data center, 5G/edge and IoT devices. In addition, Ed Sperling of Semiconductor Engineering and Shane Rau of IDC joined Rambus executives Neeraj Paliwal, Matt Jones and John Eble for […]
Rambus fellow and distinguished inventor, Dr. Steven Woo, explores the latest developments in AI/ML training and inference. AI/ML performance is advancing at an astonishing rate thanks to purpose-built AI accelerators. Dr. Woo discusses how emerging memory and system interfaces are key to providing the bandwidth needed for the next generation of AI/ML hardware.
Facing a growing matrix of threats, semiconductors must be designed with security as a fundamental consideration. In this webinar, Rambus VP and General Manager for Rambus Security, Neeraj Paliwal, discusses the principles and methodologies for secure chip design and provisioning.
Ed Sperling, Editor in Chief of Semiconductor Engineering moderates a far-ranging roundtable on the future of data center development. IDC research vice president, Shane Rau, discusses the macro trends and their impact on compute and network device architectures. Technology leaders from across Rambus will share the chip and IP solutions that can take data center […]
A hardware root of trust (RoT) provides the secure foundation for a chip or electronic system. A broad range of RoT solutions are available for implementation. In this webinar, Rambus security expert, Bart Stevens, will discuss the considerations for selecting the right root of trust for a target application.
Providing Layer 2 security, MACsec is becoming the predominant solution for safeguarding network traffic. In this webinar, Rambus security expert, Gijs Willemse, will discuss the design and implementation of hardware-based MACsec security. The Rambus MACsec protocol engines with performance to 800G will be covered.
The latest generation of the PCI Express, PCIe 5.0, advances performance to 32 GT/s in support of advanced applications including 400G Ethernet. In this webinar, Rambus technology experts Phani Paladugu and Vinitha Seevaratnam discuss the selection and implementation considerations for PCI Express solutions. The silicon-proven Rambus PCIe 5.0 interface solution consisting of integrated PHY and […]
HBM2E DRAM is the latest generation of high bandwidth memory enabling the most advanced AI accelerators and HPC solutions. In this webinar, Rambus technology experts Frank Ferro and Joe Rodriguez discuss the selection and implementation considerations for HBM2E memory solutions. The silicon-proven Rambus interface solution consisting of integrated PHY and memory controller is covered.
GDDR6 memory provides the high bandwidth needed by a growing range of applications from graphics cards to AI/ML inferencing. In this webinar, Rambus technology experts Frank Ferro and Joe Rodriguez discuss the selection and implementation considerations for GDDR6 memory solutions. The silicon-proven Rambus interface solution consisting of integrated PHY and memory controller is covered.
The confidentiality and integrity of cryptographic key material is critical to maintaining system security. A hardware root of trust, such as the Rambus CryptoManager Root of Trust, is designed to securely generate, store, and employ cryptographic keys. Tortuga Logic has independently verified the policies surrounding access to keys stored within registers in the CryptoManager Root […]