At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer.
Found 3615 Results
Rambus Reports Second Quarter 2021 Financial Results
https://www.rambus.com/second-quarter-2021-financial-results/Exceeded Q2 guidance for revenue and profitability Generated $51.6 million in cash provided by operating activities Initiated $100 million accelerated share repurchase program Accelerated data center solution roadmap with CXL Memory Interconnect Initiative Announced the acquisitions of AnalogX and PLDA SAN JOSE, Calif. – August 2, 2021 – Rambus Inc. (NASDAQ:RMBS), a provider of industry-leading chips […]
Rambus Completes Acquisition of AnalogX
https://www.rambus.com/rambus-completes-acquisition-of-analogx/Expands PCIe® 5.0 and 32G Multi-protocol SerDes with ultra-low power interface IP SAN JOSE, Calif. – July 6, 2021 – Rambus Inc. (NASDAQ: RMBS), a provider of industry-leading chips and silicon IP making data faster and safer, today announced the completion of the acquisition of AnalogX. With this acquisition, Rambus augments its family of PCIe 5.0 and […]
Rambus Acquires AnalogX
https://www.rambus.com/analogx/Rambus Acquires AnalogX, Accelerating Next-Generation Data Center Interface Solutions On July 6th, we announced the successful completion of our acquisition of AnalogX. This acquisition brings together AnalogX’s world-class team of engineers and deepens our breadth of process nodes in our Interface IP PHY portfolio, while also expanding our expertise in PAM4 technology, and accelerating our […]
Emerging Compute Architectures for the Evolving Data Center
https://www.rambus.com/emerging-compute-architectures-for-the-evolving-data-center/As the world has become increasingly connected, processing continues to evolve from the familiar cloud computing paradigm. The vast profusion of IoT devices has contributed to the exponential rise in data volume. Greater intelligence is moving to the edge of the network and to the end points themselves to provide greater, real-time functionality. The implications for global network infrastructure are profound and there are significant developments in computing architectures which will shape the future data center.
Data Center Dynamics
https://www.rambus.com/data-center-dynamics/Ed Sperling, Editor in Chief of Semiconductor Engineering moderates a far-ranging roundtable on the dynamics shaping the future of the data center. Rambus Fellow and Distinguished Inventor, Steven Woo, discusses the macro trends and their impact on compute and network device architectures. Technology leaders from across Rambus will share the chip and IP solutions that can take data center performance and security to the next level.
Securing High-Speed Data in Motion Using MACsec and Encryption Cores
https://www.rambus.com/securing-high-speed-data-in-motion/Providing Layer 2 security, MACsec is becoming the predominant solution for safeguarding network traffic. While network security is increasingly a de facto requirement, there is a growing trend of protecting the SoC interfaces as well, including short distance ones such as PCI Express (PCIe) and those to off-chip memory. In this webinar, Rambus security expert, Gijs Willemse, will discuss the design and implementation of hardware-based MACsec security and trends for high-performance inline encryption.
Securing Data Center AI/ML Workloads
https://www.rambus.com/securing-data-center-ai-ml-workloads/With the rising value of AI/ML spanning training and inference models and data, as well as the AI hardware itself, the threats from adversaries are greater than ever. As such, a security strategy for AI/ML workloads and hardware needs to offer far more than secure boot and authentication. Rambus security expert, Bart Stevens will discuss how a hardware root of trust can be the foundation for AI/ML security through defense in depth, partitioning of secure operations, and state-of-the-art protections from side channel attacks.
Selection and Implementation of a PCIe 5.0 Subsystem
https://www.rambus.com/selection-and-implementation-of-a-pcie-5-0-subsystem/The latest generation of the PCI Express, PCIe 5.0, advances performance to 32 GT/s in support of advanced applications including 400G Ethernet. In this webinar, Rambus technology experts Malini Narayanamoorthi and Vinitha Seevaratnam discuss the selection and implementation considerations for PCI Express solutions. A demonstration of the silicon-proven Rambus PCIe 5.0 interface solution consisting of integrated PHY and memory controller will be shown.
Selecting the Right High Bandwidth Memory Solution
https://www.rambus.com/selecting-the-right-high-bandwidth-memory-solution/An exponentially rising tide of data has led to the development of application-specific silicon to tackle the requirements of demanding workloads such as AI/ML training, Advanced Driver Assistance Systems (ADAS) for automotive, network graphics and HPC. To keep these processors and accelerators fed requires state-of-the-art memory solutions that deliver extremely high bandwidth. Frank Ferro will discuss design and implementation considerations of HBM2E and GDDR6 memory subsystems to address the bandwidth needs of next-generation computing applications.
HBM2E data rate: Now up to 4 Gbps (20% Increase)
https://www.rambus.com/blogs/hbm2e-data-rate/Joseph Rodriguez, senior product marketing engineer for IP cores at Rambus, has written an article for Semiconductor Engineering that explores the company’s recent achievement of reaching 4 gigabits per second (Gbps) data rate with its HBM2E memory interface. The milestone – which was demonstrated in silicon – required mastering substantial signal integrity and power integrity […]
