At Rambus, we create cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting.
Found 3495 Results
Anti-Tamper Technologies
https://go.rambus.com/anti-tampering-technologies#new_tabThe design of chip anti-tamper protection needs to adapt and scale with rising threats. Adversaries range from high school hackers to well-funded state actors. Given the threats, it’s useful to think about anti-tamper countermeasures as a hierarchy of safeguards that parallel the type, effort and expense of attacks.
Rambus Delivers 112G XSR/USR PHY on TSMC 7nm Process for Chiplets and Co-Packaged Optics in Networking and Data Center
https://www.rambus.com/112g-xsr-usr-phy-on-tsmc-7nm-process-for-chiplets-and-co-packaged-optics-in-networking-and-data-center/Highlights: Expands comprehensive portfolio of cutting-edge IP designed on TSMC’s industry-leading 7nm (N7) process Enables the most power- and cost-efficient solution for die-to-die (D2D) and die-to-optical engine (D2OE) connectivity over Extra Short Reach (XSR) and Ultra Short Reach (USR) channels Accelerates next-generation data center, networking, 5G, high-performance computing (HPC), and artificial intelligence/machine learning (AI/ML) applications […]
Side-Channel Attacks Target Machine Learning (ML) Models
https://www.rambus.com/blogs/side-channel-attacks-target-machine-learning-ml-models/Written by Paul Karazuba for Rambus Press A team of North Carolina State University researchers recently published a paper that highlights the vulnerability of machine learning (ML) models to side-channel attacks. Specifically, the team used power-based side-channel attacks to extract the secret weights of a Binarized Neural Network (BNN) in a highly-parallelized hardware implementation. “Physical […]
Embedded Hardware Security Heads to the Edge
https://www.eetimes.com/embedded-hardware-security-heads-to-the-edge/#new_tabThe days of building a moat around the castle to keep data secure were long gone before the pandemic led to a surge in remote work. With the enterprise network no longer rooted in a single place, every connection needs to be secured in line with increased server connectivity bandwidth requirements of cloud and edge […]
Rambus CryptoManager Root of Trust Cores Certified ASIL-B/D Ready for Enhanced Security in Automotive Applications
https://www.rambus.com/blogs/cryptomanager-root-of-trust-cores-certified-asil-b-d-ready-for-enhanced-security-in-automotive-applications/Highlights: Safeguards automotive Vehicle-to-Everything (V2X) communications, Advanced Driver Assistance Systems (ADAS), Electronic Control Unit (ECU) platform management, and infotainment applications Provides ISO 26262 Automotive Safety Integrity Level (ASIL)-B and ASIL-D ready security solutions Offers comprehensive suite of security features including secure boot, secure firmware updates, authentication, device personalization, secure key and data storage, and secure […]
Interview: NXP CEO Kurt Sievers | Cryptographers vs. Quantum Computers | The 8088
https://www.eetimes.com/podcasts/wb060520/##new_tabIn this episode…Kurt Sievers is the new CEO of NXP, a job he’s been groomed for … for several years. We have an exclusive interview with Sievers, who discusses where NXP is going, and how he’s going to get it there. Also, quantum computing seems to threaten the very idea of cryptography. But that’s far […]
Hardware Security for AI Accelerators
https://go.rambus.com/hardware-security-for-ai-accelerators#new_tabDedicated accelerator hardware for artificial intelligence and machine learning (AI/ML) algorithms are increasingly prevalent in data centers and endpoint devices. These accelerators handle valuable data and models, and face a growing threat landscape putting AI/ML assets at risk. Using fundamental cryptographic security techniques performed by a hardware root of trust can safeguard these assets from […]
High-Performance Memory for AI/ML and HPC: Part 2
https://www.rambus.com/blogs/high-performance-memory-for-ai-ml-and-hpc-part-2/In part one of this two-part series, Semiconductor Engineering Editor in Chief Ed Sperling and Rambus Sr. Director of Product Management Frank Ferro took a closer look at the various types of memory that system designers are using to support artificial intelligence (AI), machine learning (ML), and high-performance computing (HPC) applications. In this blog post, […]
AI Requires Tailored DRAM Solutions
https://go.rambus.com/ai-requires-tailored-dram-solutions-webinar#new_tabJoin Rambus for a webinar exploring how Dynamic Random Access Memory (DRAM) is a key enabler for Artificial Intelligence (AI). Featuring Frank Ferro, senior director of product management for memory interface IP at Rambus, and Shane Rau, research vice president, computing semiconductors at IDC, this webinar will cover the rapid advancement of AI and how […]
High-Performance Memory for AI/ML and HPC: Part 1
https://www.rambus.com/blogs/high-performance-memory-for-ai-ml-and-hpc-part-1/Semiconductor Engineering Editor in Chief Ed Sperling recently spoke with Rambus Sr. Director of Product Management Frank Ferro about designing high-performance memory subsystems for artificial intelligence (AI), machine learning (ML), and high-performance computing (HPC) applications. As Ferro notes, there is plenty of compute (CPU) power available today to support the above-mentioned markets. “[However], the advances […]
