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Semiconductor Engineering Editor in Chief Ed Sperling recently spoke with Rambus Sr. Director of Product Management Frank Ferro about designing high-performance memory subsystems for artificial intelligence (AI), machine learning (ML), and high-performance computing (HPC) applications. As Ferro notes, there is plenty of compute (CPU) power available today to support the above-mentioned markets. “[However], the advances […]
Excellent quarter, exceeding expectations for revenue and profit: GAAP revenue of $64.0 million; licensing billings of $67.1 million, product revenue of $30.7 million, and contract and other revenue of $13.6 million $37.3 million in cash provided by operating activities, further strengthening the balance sheet Record revenue from both the silicon IP and chip businesses, bolstered […]
For end-to-end security of data and devices, data must be secured both when it as rest (stored on a connected device) and when it is in motion (communicated between connected devices). For data at rest, a hardware root of trust anchored in silicon provides that foundation upon which all device security is built. Similarly, MACsec […]
Highlights: Integrated hardware-based solution delivers full line-rate MACsec security at 100G to 800G data rates Supports multi-channel, multi-rate implementations with flexible bandwidth allocation Delivers enhanced data security for cloud, enterprise and carrier network applications as well as network-attached, high-performance computing (HPC) and AI/ML SUNNYVALE, Calif. – Apr. 29, 2020 – Rambus Inc. (NASDAQ: RMBS), a premier silicon IP and […]
Ethernet has become the ubiquitous communication solution from the desktop to the carrier network. In data centers at the heart of the network, the need to process and move an exponentially growing torrent of data has driven the rapid jumps in the performance of Ethernet. 800G Ethernet, officially unveiled earlier this month by the Ethernet […]
In part one of this two-part blog series, Semiconductor Engineering editor in chief Ed Sperling spoke with Steven Woo, Rambus fellow and distinguished inventor, about the relationship between Moore’s Law and the thermal challenges faced by the semiconductor industry. Specifically, Woo highlighted how the breakdown of Dennard scaling around 2005 prompted GPU designers to place […]
Security Anti-Tamper Cryptographic Cores Rambus DPA (Differential Power Analysis) Resistant Cryptographic hardware cores guard against the various side channel attacks that exploit unprotected cryptographic designs. Easily integrated into an ASIC or FPGA design, these cores resist tampering attacks attempting to obtain secret cryptographic key material through Differential Power Analysis (DPA), Differential Electromagnetic Analysis (DEMA) or […]
Semiconductor Engineering editor in chief Ed Sperling spoke with Steven Woo, Rambus fellow and distinguished inventor, about the relationship between Moore’s Law, Dennard scaling and thermal challenges. As Woo notes, there is a “tug of war” between the benefits that Moore’s Law provides and the breakdown of Dennard scaling in 2005. “Systems now need to […]
Recently Rambus fellow and distinguished inventor, Steve Woo, had a web chat with Bill Wong, technology editor for Electronic Design, to discuss some of the latest hardware trends in AI/ML. This was part of an ongoing conversation Steve and Bill have had regarding leading-edge developments in the AI/ML revolution. In the webcast, Steve discusses some […]
Today’s encryption methods are generally broken down into two types: symmetric and asymmetric. Symmetric encryption relies on the sender and receiver to have identical, secret cryptographic keys that are used to encrypt the data at the sender and decrypt it at the receiver. Asymmetric or “public-key” encryption instead uses a publicly-available key to let senders […]