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PCIe Switch for USB4

https://www.rambus.com/interface-ip/pci-express/pcie-switch-for-usb4/

PCIe Switch for USB4 Contact Us The PCIe Switch for USB4 (formerly XpressSWITCH) is a customizable, embedded switch for PCI Express (PCIe) designed for implementations in USB4 devices. ContactProduct Brief How the PCIe Switch for USB4 Works A fully configurable fanout switch, the PCIe Switch for USB4 provides one upstream port and up to 31 […]

PCIe 3.1 Controller

https://www.rambus.com/interface-ip/pci-express/pcie3-controller/

PCIe 3.1 Controller Contact Us The PCIe 3.1 Controller (formerly XpressRICH) is designed to achieve maximum PCI Express (PCIe) 3.1 performance with great design flexibility and ease of integration. It is fully compatible with the PCIe 3.1/3.0 specification. A PCIe 3.1 Controller with AXI (formerly XpressRICH-AXI) is also available. The controller delivers high-bandwidth and low-latency connectivity […]

Rambus Completes Acquisition of PLDA

https://www.rambus.com/rambus-completes-acquisition-of-plda/

Extends CXL™ and PCI Express® Digital IP Leadership  SAN JOSE, Calif. – August 18, 2021 – Rambus Inc. (NASDAQ: RMBS), a provider of industry-leading chips and silicon IP making data faster and safer, today announced the completion of the acquisition of PLDA. With this acquisition, Rambus expands its digital controller offerings with complementary CXL 2.0, PCIe 5.0 and […]

Debug and Test Solutions

https://www.rambus.com/interface-ip/pci-express/debug-and-test-solutions/

Debug and Test Solutions Contact Us Gen5HOST PCIe 5.0 Host Enabling Reference Platform for Prototyping & Development of PCIe 5.0 Devices and Applications. Contact Product Brief Gen5HOST Gen5HOST provides a platform for prototyping and developing PCIe 5.0 hardware and software. At the core of Gen5HOST is the Rambus PCIe 5.0 Switch IP running on a […]

CCIX 1.1 Controller with AXI Product Brief

https://go.rambus.com/ccix1-controller-axi-product-brief#new_tab

The PLDA CCIX 1.1 Controller with AXI supports the PCI Express 5.0, 4.0 and 3.1/3.0 specifications, as well as with version 4.x and 5.x of the PHY Interface for PCI Express (PIPE) specification, and supports the CCIX Extended Speed Mode as defined in the CCIX Base Specification Revision 1.1.

Rambus Acquires PLDA

https://www.rambus.com/plda/

Rambus Acquires PLDA, Accelerating Next-Generation Data Center Interface Solutions On August 18th, we announced the successful completion of our acquisition of PLDA. This acquisition demonstrates our continued focus on silicon solutions and building on our strength in core semiconductor technology. With the addition of PLDA world-class products and engineering expertise, Rambus will further its leadership in mission critical interconnect solutions, creating innovative interface IP solutions for our customers, […]

CXL 2.0 Controller

https://www.rambus.com/interface-ip/cxl/cxl2-controller/

CXL 2.0 Controller Contact Us Rambus Compute Express Link™ (CXL™) 2.0 Controller (formerly XpressLINK) leverages a silicon-proven PCIe 5.0 controller architecture for the CXL.io path, and adds CXL.cache and CXL.mem paths specific to the CXL standard. The controller exposes a native Tx/Rx user interface for CXL.io traffic as well as an Intel CXL-cache/mem Protocol Interface […]

Delivering Terabyte-Scale Bandwidth with HBM3-Ready Memory Subsystem

https://www.rambus.com/blogs/hbm3-memory-subsystem/

An exponential rise in data volume, and the meteoric rise of advanced workloads like AI/ML training, requires constant innovation in all aspects of computing. Memory bandwidth is a critical enabler of unleashing the power of processors and accelerators, and the High Bandwidth Memory (HBM) standard has evolved rapidly to deliver the performance required by the most demanding applications.  For current generation HBM2E, Rambus […]

Rambus Advances AI/ML Performance with 8.4 Gbps HBM3-Ready Memory Subsystem

https://www.rambus.com/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem/

Highlights:  Provides HBM3-ready memory subsystem solution consisting of fully-integrated PHY and digital controller Supports data rates up to 8.4 Gigabits per second (Gbps), enabling terabyte-scale bandwidth accelerators for artificial intelligence/machine learning (AI/ML) and high-performance computing (HPC) applications Leverages market-leading HBM2/2E experience and installed-base to speed implementation of customer designs using next-generation HBM3 memory SAN JOSE, […]

Rambus Design Summit Featured Speaker: Frank Ferro

https://www.rambus.com/blogs/rambus-design-summit-featured-speaker-frank-ferro/

Thanks to everyone who joined us for Rambus Design Summit 2021. Over the coming weeks we’ll highlight the webinars and panels from the event all available now on-demand. About Frank Ferro Frank Ferro is the senior director of product management at Rambus Inc. responsible for memory interface IP products. Having spent more than 20 years […]

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