Rick Merritt of the EE Times reports that Rambus has working silicon in its labs for DDR5, which the journalist describes as the next major interface for DRAM dual in-line memory modules (DIMMs). The register clock drivers and data buffers, says Merritt, could help double the throughput of main memory in servers, probably starting in 2019.
“We are expecting production in 2019 and we want to be first to market to help partners bring up the technology.”
As Merritt notes, DDR5 is expected to support data rates up to 6.4 Gbits/second delivering 51.2 GBytes/s max, up from 3.2 Gbits and 25.6 GBytes/s for today’s DDR4.
“The new version will push the 64-bit link down to 1.1V and burst lengths to 16 bits from 1.2V and 8 bits. In addition, DDR5 lets voltage regulators ride on the memory card rather than the motherboard,” he explained. “In parallel, CPU vendors are expected to expand the number of DDR channels on their processors from 12 to 16. That could drive main memory sizes to 128 Gbytes from 64 GB today.”
DDR5 is expected to first appear on high performance systems running large databases or memory-hungry applications such as machine learning. While some servers may lag adopting DDR5 for six months or so, Dhulla told the EE Times that this scenario will last just a couple of quarters, rather than a couple years.
“Everyone wants a fatter memory pipe… DDR5 is clearly the path to a high-volume opportunity. The big industry debate is what happens beyond DDR5, beyond 2023. [This is why] our labs are looking at multiple alternatives,” he concluded.
As we’ve previously discussed, Rambus recently announced the very first silicon-proven memory buffer chip prototype capable of achieving the speeds required for the upcoming DDR5 standard. Data-intensive applications such as Big Data analytics and machine learning will be key drivers for the adoption of DDR5, with enterprise close behind. Server DIMM chipsets, such as registered clock drivers and data buffers, will be critical to enabling higher memory capacities while maintaining peak performance. Our server DIMM chip prototype leverages the signal integrity and low power, mixed-signal design expertise of Rambus to enable development of next-generation solutions for future data center workloads.
Interested in learning more? You can check out our DDR5 DIMM chipset page here.