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Memory Interface Chips

DDR5 DIMM Chipset

The Rambus DDR5 DIMM memory interface chipset is tailored for the high-capacity, high-speed performance requirements of the latest generation DDR5 memory systems. Our chips enable server and client computing systems to handle the most demanding workloads and applications.

How the DDR5 DIMM Chipset Works

Our DIMM Chipset enables increased memory capacity, while maintaining peak performance on a dual inline memory module (DIMM). These gains are essential to handle the most grueling data-intensive applications.

DDR5 Registering Clock Drivers (RCD), Serial Presence Detect Hubs (SPD Hub) and Temperature Sensors (TS) are targeted for use in server DDR5 Registered DIMMs (RDIMMs), Load Reduced DIMMs (LRDIMMs), and Non-volatile memory DIMMs (NVDIMMs) to deliver exceptional bandwidth, performance and capacity. The SPD Hub also enables DDR5 Unbuffered DIMMs (UDIMMs) and Small-Outline DIMMs (SODIMMs) for PC clients.

Watch a demo of our DDR5 Server DIMM buffer chipset
Play Video about Watch a demo of our DDR5 Server DIMM buffer chipset

Watch a video demo of our DDR5 Server DIMM buffer chipset 

The RCD is the key control plane chip which distributes Command/Address signals and clock to the DRAM devices on the DIMM.

The SPD Hub enables communication via the I3C bus of important data for system configuration and thermal management. It has an integrated temperature sensor.

Two TS per DIMM offer precision thermal sensing and, in combination with the SPD Hub, provide three points of thermal telemetry for the memory module.

DDR5 RDIMM block diagram showing RCD, SPD Hub and Temperature Sensors
DDR5 RDIMM block diagram showing RCD, SPD Hub and Temperature Sensors
Part Number Description Applications
RCD1-G1EX Registering Clock Driver Server RDIMM, LRDIMM, NVDIMM
SPD5118-G1B SPD Hub with Internal Temperature Sensor Server RDIMM, LRDIMM, NVDIMM PC UDIMM, SODIMM
TS5110-G1B Temperature Sensor Server RDIMM, LRDIMM, NVDIMM
DDR5 UDIMM block diagram showing SPD Hub
DDR5 UDIMM block diagram showing SPD Hub

Scaling DDR5

DDR5 DIMMs increase memory bandwidth and capacity over DDR4 DIMMs with new innovations and a new module architecture. While DDR4 DIMMs top out at 3200 MT/s, the first DDR5 DIMMs operate at 4800 MT/s, a 50% increase in memory bandwidth. Given the voracious demands for greater memory bandwidth to support advanced workloads including HPC and AI/ML, DDR5 will continue to scale. Rambus is already working on the next wave of DDR5 solutions with the announcement of the industry’s first 5600 MT/s RCD. You can check out all the features and benefits of DDR5 server DIMMs here.

DDR5 RDIMMs Showing Rambus Memory Interface Chips
DDR5 RDIMMs Showing Rambus Memory Interface Chips
Data Center Evolution: DDR5 DIMMs Advance Server Performance cover

Data Center Evolution: DDR5 DIMMs Advance Server Performance

Driven by a confluence of megatrends, global data traffic is increasing at an exponential rate. For example, 5G networks are enabling billions of AI-powered IoT devices untethered from wired networks. Nowhere is the impact of all this growth being felt more intensely than in data centers. Indeed, hyperscale data centers have become the critical hubs of the global data network. DDR5 DRAM will enable the next generation of server systems providing the massive computing power of hyperscale and enterprise data centers. Learn about the benefits of DDR5 memory and the design considerations for implementing DDR5 DIMMs.

Solution Offerings

More capacity and more bandwidth: DDR5 memory enables next-generation data centers

Hear Shane Rau, Research Vice President at IDC discuss the market and technology trends surrounding the DDR5 transition, including workloads, hardware needs, market perspectives and industry timing. Joining him, John Eble, Vice President of Product Marketing at Rambus will examine the changes from DDR4 to DDR5 that are enabling more memory capacity and bandwidth critical to scaling future data centers.

Servers and the Drive to DDR5

This IDC Technology Spotlight Study, sponsored by Rambus, discusses server demands on DRAM and different workloads. DRAM must dynamically adjust to the needs of these disparate workloads. The history of dynamic random-access memory (DRAM) is characterized by the ability of the technology to adapt to the increasingly specialized real-time memory requirements of the applications that utilize it. The COVID-19 pandemic changed the average DRAM content by workload balance in servers. While workloads require servers to adapt to their specific needs, servers must be based on standardized, scalable technologies to be affordable. Over time, DDR5 will be essential to meet the average server’s DRAM needs.