Memory + Interfaces

DDR5 DIMM Chipset

The Rambus DDR5 Server DIMM buffer chipset is the industry’s first functional silicon targeted for next-generation DDR5. Our chips are designed to enable high-capacity, high-speed and robust memory solutions for tomorrow’s most demanding enterprise and data center applications.

Contact

How the DDR5 Server DIMM Chipset Works

Our Server DIMM Chipset will enable increased memory capacity, while maintaining peak performance on a dual inline memory module (DIMM). These gains are essential for tomorrow’s most grueling data-intensive applications.

DDR5 data buffers (DB) and DDR5 registering clock drivers (RCD), are targeted for use in DDR5 Registered DIMMs (RDIMMs) and DDR5 Load Reduced DIMMs (LRDIMMs), to deliver higher bandwidth, performance and capacity versus unbuffered DIMMs. RDIMMS and LRDIMMs reduce load on the CPU and improve the signal integrity of the command/address bus. Specifically, the DDR5 DB will reduce the effective load on the data bus, which enables higher-capacity DRAMs on the module without reducing latency.

DDR5 will significantly increase capacity and speed from DDR4 and DIMM chipsets offer enhanced performance and margin with this new memory standard.

About DDR5

DDR5 is a working DRAM standard being created by JEDEC and is the next evolutionary step from DDR4. The new features in DDR5 will target the specific problems being caused by the exponential growth in data generated by IoT, cloud services and real-time data analytics, and address the need to continuously process, move, and analyze that data faster. These enhancements are expected to include higher density, a new command structure and new power saving features. DDR5 will also likely introduce signal equalization and error correction.