Joohee Kim of Rambus will be presenting a paper at DAC 2016 about how ANSYS simulation can be used to make IP more consumable by ensuring the integrity of complex designs. In addition to presenting at ANSYS’ Booth Session, Joohee Kim will be speaking at DAC’s IP Track and Poster Session.
ANSYS allows engineers to create complete virtual prototypes of complex products and systems – comprised of mechanical, electronics and embedded software components – which incorporate all the physical phenomena that exist in real-world environments.
“Proper design planning and sign-off for power noise, electro-migration and ESD reliability are careful design considerations in our mixed-signal IP and product design process,” Hai Lan, the senior manager of signal integrity at Rambus, explained. “We look forward to the upcoming opportunity at DAC to share how Rambus is able to leverage ANSYS simulation and optimization solutions to ensure the integrity of our complex designs, making our IP more consumable.”
It should be noted that over 25 papers from ANSYS customers will be included as part of DAC’s Designer and IP Track. Speakers are expected to highlight the methodologies and flows that address complex challenges, as well as how engineers
use ANSYS tools to design the next generation of electronic devices.
The annual Design Automation Conference kicks off on June 5 in Austin, Texas. DAC offers attendees access to training, education and exhibits, along with extensive networking opportunities.
Rambus will be attending a number of additional conferences throughout the year, including ICM2016, the IoT Developer’s Conference, Computex, the GSA Silicon Summit, IBC, EPEPS and ARM TechCon.
A full list of upcoming and archived events can found here.