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The IP is silicon-proven with immediate availability October 4, 2018 – Northwest Logic and Mixel® announced today that their MIPI® CSI-2SM and DSI-2SM solutions which utilize MIPI C-PHY SM / D-PHY SM have been deployed and silicon proven in 28nm, 40nm, 55nm and 65nm process nodes. These high performance, low power, cost effective solutions contain […]
GEO Product Delivers Computer Vision to a Broader Class of Vehicles San Jose, CA – September 27th, 2018 – Mixel®, a leader in mixed-signal intellectual property (IP), announced today that GEO Semiconductor, Inc. (“GEO”), the market leader in camera video processors (CVP) for automotive viewing cameras, has licensed the Mixel MIPI® IP, incorporating it into […]
Semiconductor Engineering’s Ann Steffora Mutschler recently penned an article about memory design. As Mutschler notes, memory design considerations are impacted by a range of factors, including cost, power, bandwidth and latency. “When it comes to designing memory, there is no such thing as one size fits all,” she explains. “And given the long list of […]
Annual revenue of $393.1 million, up 17% year over year; fourth quarter revenue of $101.9 million, up 4% year over year Fourth quarter GAAP diluted net loss per share of $0.29; fourth quarter non-GAAP diluted net income per share of $0.19 Annual royalty revenue of $289.6 million and licensing billings of $289.6 million; fourth quarter […]
Frank Ferro, a senior director of product management at Rambus, recently penned an article for Semiconductor Engineering about the promises and challenges of 7 nanometers (nm). According to Ferro, the demand for 7nm is driving expected initial tape-outs from fabs by the end of 2017 – with initial volumes kicking off in 2018 and ramping […]
Rambus’ silicon-proven, high-speed SerDes solutions Rambus is now offering a suite of silicon-proven, high-speed SerDes solutions developed for the GLOBALFOUNDRIES high-performance FX-14™ ASIC platform. The suite includes 16G MPSL (multi-protocol serial link), 30G C2C (chip-to-chip) and 30G VSR (very short reach) PHYs. Rambus’ SerDes PHYs include a physical media attachment (PMA) hard macro and physical […]
HBM2 PHY We are showcasing our HBM2 PHY at the GLOBALFOUNDRIES Technology Conference at the Hyatt Regency Santa Clara (table #6). Designed for systems that require low latency and high bandwidth memory, our HBM2 PHY is built on GLOBALFOUNDRIES advanced 14nm Power Plus (LPP) process technology. The PHY is fully compliant with the JEDEC HBM2 […]
Northwest Logic, Rambus and GLOBALFOUNDRIES Demonstrate Complete, Silicon-Proven HBM2 Solution Northwest Logic, Rambus and GLOBALFOUNDRIES have demonstrated a complete, silicon-proven High Bandwidth Memory Gen2 (HBM2) solution. This solution utilizes the Rambus HBM2 PHY and Northwest Logic’s HBM2 Controller Core on the GLOBALFOUNDRIES 14nm FinFET (FX-14) process. The solution is fully compliant with the JEDEC HBM2 […]
Juniper Research analysts are forecasting 1.4 billion 5G connections by 2025, an increase from just 1 million – upon commercial launch of 5th generation wireless systems – in 2019. Unsurprisingly, the U.S. alone is expected to account for over 30% of global 5G IoT connections by 2025, with the highest number of 5G connections for […]
Integrated HBM2 PHY and Memory Controller provide validated, standards-compliant memory subsystem with superior signal integrity and reliability SUNNYVALE, Calif. – Aug. 28, 2017 – Rambus Inc. (NASDAQ: RMBS), an innovator in semiconductor and IP products, today announced validated interoperability between its HBM2 PHY and Northwest Logics’ HBM2 Memory Controller Core. The solution builds on the growing ecosystem […]