Designing automotive memory
This entry was posted on Thursday, April 5th, 2018.
Semiconductor Engineering’s Ann Steffora Mutschler recently penned an article about memory design. As Mutschler notes, memory design considerations are impacted by a range of factors, including cost, power, bandwidth and latency.
“When it comes to designing memory, there is no such thing as one size fits all,” she explains. “And given the long list of memory types and usage scenarios, system architects must be absolutely clear on the system requirements for their application.”
Perhaps not surprisingly, the automotive sector is currently one of the hottest markets for (memory) chip design.
“For self-driving cars, the number of sensors that are being deployed in the cars to get feedback about all the real-time information is exploding – and for a car to do different levels of driver assistance requires multiple sensors feeding into advanced logic,” she elaborates. “The amount of data that needs to be processed is enormous, because in the case of vision and radar this data is being streamed through the sensor network.”
According to Frank Ferro, senior director of product management at Rambus, power is always an important consideration, although there is more of an emphasis on cost versus bandwidth in the automotive sector. Put simply, performance and price are neck and neck, with power coming in at third place.
“Chipmakers are looking at memory systems that can handle bandwidth greater than 100 Gbps and higher as you get into different levels of driver assisted cars – and ultimately self-driving cars,” Ferro tells Semiconductor Engineering.
“In order to do that, the number of memory choices starts to narrow down quite a bit in terms of what can provide you with the necessary bandwidth to process all that data that is coming in.”
As Ferro points out, some of the early advanced driver-assistance systems (ADAS) system designs included both DDR4 and LPDDR4 because that was what was available at the time, although have their advantages and disadvantages.
“DDR4 is obviously the cheapest option available and those are in the highest-volume productions,” he states. “They are certainly very cost-effective and very well understood. Doing error correction on DDR4 is simpler and well understood. LPDDR4 was also an option that was used, as well.”
Moving forward, says Ferro, the automotive industry can expect a range of memory types to coexist in different systems.
“If [systems] are heavily cost-driven, then they are going to be looking at something like DDR or maybe even LPDDR4,” he explained. “But if they are heavily bandwidth-driven, [system designers] will be looking at something like HBM or GDDR. It’s really a function of where you are in your architecture stage.”
In addition, says Ferro, there are also various levels of ADAS capabilities to consider, as well as what’s required for the system and shipping timeframe.
“If you are getting a system shipping this year, it would have a different solution than systems being developed for next year or the year after that,” he continues. “Those are all the things that we are seeing on the continuum of time-to-market versus cost.”
On the high-performance side, says Ferro, the bandwidth-power tradeoff is the key challenge from a system-design standpoint. For example, how does an engineer get more bandwidth to fit in a reasonable area on a chip with reasonable power consumption?
“If you have an HBM [design], it is very efficient from a power and area standpoint because it uses 3D stacking technology, so from a power efficiency point of view, HBM is fantastic,” he added. “And from an area standpoint, one HBM stack takes up a relatively small amount of space, so that’s a really nice-looking solution from a power-performance perspective. You get great density, you get great power, low power, within a small area.”
Interested in learning more? The full text of “How to choose the right memory” by Ann Steffora Mutschler is available on Semiconductor Engineering here.