Found 3637 Results

Steven Woo

https://www.rambus.com/inventors/inventor-steven-woo/

Steven Woo Fellow & Distinguished Inventor Research Areas: Computer Architecture, Memory Systems, Performance Analysis and Parallel Programming I was drawn to Rambus to focus on cutting edge computing technologies. Throughout my 15+ year career, I’ve helped invent, create and develop means of driving and extending performance in both hardware and software solutions. At Rambus, we are […]

Thomas Vogelsang

https://www.rambus.com/inventors/inventor-thomas-vogelsang/

Thomas Vogelsang Fellow  Research Areas: DRAM Memory Devices and Systems Computer memory has interested me since the beginning of my career. While I started in device physics, over the years my research focus moved to circuit design and system usage of DRAM without losing the foundation of understanding details down to the transistor and manufacturing […]

Scott Best

https://www.rambus.com/inventors/inventor-scott-best/

Scott Best Senior Technical Director Research Areas: Memory architectures, 3D packaging, Security processors Scott Best joined Rambus in October 1998 who, while serving in many and varied technical roles, has become one of the most prolific inventors in the company’s history. Over the course of his career at Rambus, he is a named inventor on […]

Google wants 5 petabit switching

https://www.rambus.com/blogs/mid-google-wants-5-petabit-switching/

The Platform’s Timothy Prickett Morgan reports that Google is eyeing networking throughput capabilities of 5 petabits per second. However, as Google Fellow Amin Vahdat recently pointed out, the industry currently “underprovisions” networks because it doesn’t (yet) know how to build big networks capable of delivering “lots” of bandwidth. According to Vahdat, the ideal network should […]

Google wants 5 petabit switching

https://www.rambusblog.com/2015/07/30/mid-google-wants-5-petabit-switching/#new_tab

The Platform’s Timothy Prickett Morgan reports that Google is eyeing networking throughput capabilities of 5 petabits per second. However, as Google Fellow Amin Vahdat recently

When power becomes a problem

https://www.rambus.com/blogs/when-power-becomes-a-problem-2/

Semiconductor Engineering editor in chief Ed Sperling recently reported that the current emphasis on lowering power – in everything from wearable electronics to data centers – is turning into a “perfect storm” for the semiconductor ecosystem. “In the past, most issues involving power—notably current leakage, physical effects such as electromigration, electrostatic discharge, RC delay and […]

When power becomes a problem

https://www.rambusblog.com/2015/07/29/when-power-becomes-a-problem/#new_tab

Semiconductor Engineering editor in chief Ed Sperling recently reported that the current emphasis on lowering power – in everything from wearable electronics to data centers

Is DRAM adhering to Moore’s Law?

https://www.rambus.com/blogs/mid-is-dram-adhering-to-moores-law/

Writing for PC Magazine, Michael J. Miller notes that although most of the discussion around Moore’s Law has thus far focused on logic chips, the memory industry has clearly entered a transitional stage. “DRAM shrinks have slowed dramatically. Most of the makers are now in the transition to 20nm DRAM with perhaps one or two […]

Is DRAM adhering to Moore’s Law?

https://www.rambusblog.com/2015/07/28/mid-is-dram-adhering-to-moores-law/#new_tab

Writing for PC Magazine, Michael J. Miller notes that although most of the discussion around Moore’s Law has thus far focused on logic chips, the

Leadership

https://www.rambus.com/leadership/

Leadership Explore Rambus Luc Seraphin President & CEO John Allen VP & Chief Accounting Officer Simon Blake-Wilson SVP, General Manager of Silicon IP Cliff Burnette SVP & CHRO I Nong Chao SVP, Global Operations Sean Fan EVP & COO Sumeet Gagneja SVP & CFO Matt Jones SVP, Corporate Strategy Shyam Ramachandran SVP & CIO Kit […]

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