Designed to be integrated in power and space-constrained microcontrollers or SoCs, the VaultIP Root of Trust Engine is a family of FIPS 140-2 compliant hardware cores that guard the most sensitive assets on chips and establishes the foundation for platform security.
Featuring a state-machine architecture with dedicated secure memories, the VaultIP Root of Trust family provides a variety of cryptographic accelerators, including AES, SHA-2 and ECC. Ideal for power and space-sensitive applications like IoT, edge, and industrial use, the VaultIP Root of Trust offers the best balance of size and performance available on the market.
|VaultIP-IoT||IoT, Edge||State-machine (fixed function) for high-volume applications|
|VaultIP-SM||China||State-machine (fixed function) for Chinese high-volume applications|
Readily deployable, the VaultIP Root of Trust is offered in off-the-shelf configurations, allowing a choice tailored to the needs of your application. Configurations differ by cryptographic accelerators contained and 3rd-party certification and standard compliance. Rambus also offers a series of programmable secure co-processors in its CryptoManager Root of Trust solutions.
|Application Focus||Example Applications||IoT||China|
|FIPS 140 CAVP||FIPS 140-2 CAVP & FIPS 140-3 CAVP (2020)|
|FIPS 140 CMVP||FIPS 140-2 CMVP & FIPS 140-3 CMVP (2020)||—|
|DPA Resistance||Asymmetric RSA/ECC|
|Feature Management Core||Just-in-time – SKU Management||–|
|3DES HW||3DES Core||optional||–|
|Chinese Algorithms||Chinese SM2-3-4 Algorithms||–|
|AES HW||ECB, CBC, CTR Modes – Max Key Size (bits)||256||256|
|AES-GCM HW||ECB, CBC, CTR, GCM modes – Max Key Size (bits)||optional||optional|
|HMAC-SHA2 HW||SHA-2 and HMAC-SHA2 – Max SHA-2 Mode (bits)||256||256|
|Public Key Engine||RSA, ECC Acceleration Core||16×16||16×16|
|ECC HW||Max Curve Size (bits)||521||521|
|RSA HW||Max Exponent Size (bits)||3096||3096|
|Random Number Generator HW||NIST SP800 compliant TRNG|
|I/O Performance||Throughput (Gbps)||1||1|
|Crypto Performance||Crypto/Hash Performance (Gbps) @500MHz||0.4||0.4|
|DMA||Standard (STD) or Multi-channel (MC)||STD||STD|
|I/O Bus||AMBA Bus Master/Slave||AHB/APB||AHB/APB|
|OTP Interface||Interface to 3rd-Party OTP||TCM||TCM|
|Multiple Roots of Trust||Roots/Key Splits||1||1|
Don’t miss out on the Rambus Design Summit on October 8th!