The Northwest Logic DDR4 controller core is designed for high memory throughput, high clock rates, and full programmability in computing and networking applications. With the Rambus DDR4 PHY it comprises a complete DDR4 memory interface subsystem.
DDR3 Controller Product Brief
The Northwest Logic DDR3 controller core is designed for high memory throughput, high clock rates, and full programmability in computing and networking applications. With the Rambus DDR3 PHY it comprises a complete DDR3 memory interface subsystem.
Read-Modify-Write Core Product Brief
Part of a full suite of memory controller add-on cores, the Read-Modify-Write Core handles misaligned bursts when an Error Correction Code (ECC) is being used. Read-Modify-Write write operations are by their very nature inefficient. The Read-Modify-Write core implements a prefetch architecture that maximizes the memory bus utilization as efficiently as possible.
Memory Test Analyzer Core Product Brief
Part of a full suite of memory controller add-on cores, the Memory Test Analyzer Core can be used in conjunction with the Memory Test Core to capture actual and expected test data. The core is useful for chip and board validation. It provides low-cost, built-in logic analyzer capability similar in concept to FPGA-based internal logic analyzer tools.
Multi-Port Front-End Core Product Brief
Part of a full suite of memory controller add-on cores, the Multi-Port Front-End Core provides a multi-port interface to Northwest Logic memory controller cores.
AXI Interface Core Product Brief
Part of a full suite of memory controller add-on cores, the AXI Interface Core is designed for use in applications requiring ARM’s Advanced eXtensible Interface (AXI). It requires the Read-Modify-Write core which is available separately.
